參數(shù)資料
型號: M37736EHBGS
元件分類: 微控制器/微處理器
英文描述: 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CQCC100
封裝: WINDOWED, CERAMIC, LCC-100
文件頁數(shù): 13/34頁
文件大?。?/td> 557K
代理商: M37736EHBGS
19
PROM VERSION OF M37736MHBXXXGP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M67736EHBGS
[External bus mode A]
Memory expansion mode and microprocessor mode
Bus timing data formulas (VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Max., Note), unless otherwise noted)
Address output delay time
Address hold time
ALE pulse width
Address output setup time
Address hold time
ALE output delay time
Data output delay time
Data hold time
_
E
pulse width
Floating start delay time
Floating release delay time
No wait
Wait 1
Wait 0
45
5
1 ! 109
2 f(f2)
3 ! 109
2 f(f2)
1 ! 109
2 f(f2)
3 ! 109
2 f(f2)
1 ! 109
2 f(f2)
1 ! 109
2 f(f2)
2 ! 109
2 f(f2)
1 ! 109
2 f(f2)
2 ! 109
2 f(f2)
ns
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
1 ! 109
2 f(f2)
ns
9
4
1 ! 109
2 f(f2)
1 ! 109
2 f(f2)
2 ! 109
2 f(f2)
4 ! 109
2 f(f2)
ns
1 ! 109
2 f(f2)
1 ! 109
2 f(f2)
3 ! 109
2 f(f2)
1 ! 109
2 f(f2)
3 ! 109
2 f(f2)
1 ! 109
2 f(f2)
1 ! 109
2 f(f2)
– 28
– 33
– 28
– 45
– 22
– 18
– 23
– 35
– 25
– 30
– 22
– 30
– 20
– 28
– 33
– 28
– 33
– 22
Unit
Symbol
Parameter
Limits
Wait mode
Min.
Max.
td(An–E)
td(A–E)
th(E–An)
tw(ALE)
tsu(A–ALE)
th(ALE–A)
td(ALE–E)
td(E–DQ)
th(E–DQ)
tw(EL)
tpxz(E–DZ)
tpzx(E–DZ)
No wait
Wait 1
Wait 0
___
BHE
output delay time
_
R/W output delay time
td(BHE–E)
td(R/W–E)
th(E–BHE)
th(E–R/W)
td(E–
φ1)
φ1 output delay time
_
R/W hold time
___
BHE
hold time
0
18
ns
Notes 1. This applies when the main-clock division selection bit = “0”.
2. f(f2) represents the clock f2 frequency.
For the relation to the main clock and sub clock, refer to Table 10 in data sheet “ M37736MHBXXXGP ”.
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