參數(shù)資料
型號(hào)： M37736EHBGS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CQCC100
封裝： WINDOWED, CERAMIC, LCC-100
文件頁(yè)數(shù)： 8/34頁(yè)
文件大?。?/td> 557K
代理商： M37736EHBGS
15
PROM VERSION OF M37736MHBXXXGP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M67736EHBGS
Limits
Min.
Max.
tc(AD)
ADTRG
input cycle time (minimum allowable trigger)
1000
ns
tw(ADL)
ADTRG
input low-level pulse width
125
ns
Limits
Min.
Max.
tc(CK)
CLKi input cycle time
200
ns
tw(CKH)
CLKi input high-level pulse width
100
ns
tw(CKL)
CLKi input low-level pulse width
100
ns
td(C–Q)
TXDi output delay time
80
ns
th(C–Q)
TXDi hold time
0ns
tsu(D–C)
RXDi input setup time
30
ns
th(C–D)
RXDi input hold time
90
ns
Limits
Min.
Max.
tc(TB)
TBiIN input cycle time (one edge count)
80
ns
tw(TBH)
TBiIN input high-level pulse width (one edge count)
40
ns
tw(TBL)
TBiIN input low-level pulse width (one edge count)
40
ns
tc(TB)
TBiIN input cycle time (both edges count)
160
ns
tw(TBH)
TBiIN input high-level pulse width (both edges count)
80
ns
tw(TBL)
TBiIN input low-level pulse width (both edges count)
80
ns
Unit
Symbol
Parameter
Timer B input (Count input in event counter mode)
Limits
Min.
Max.
tc(TB)
TBiIN input cycle time (Note)
320
ns
tw(TBH)
TBiIN input high-level pulse width (Note)
160
ns
tw(TBL)
TBiIN input low-level pulse width (Note)
160
ns
Unit
Symbol
Parameter
Timer B input (Pulse period measurement mode)
Limits
Min.
Max.
tc(TB)
TBiIN input cycle time (Note)
320
ns
tw(TBH)
TBiIN input high-level pulse width (Note)
160
ns
tw(TBL)
TBiIN input low-level pulse width (Note)
160
ns
Unit
Symbol
Parameter
Timer B input (Pulse width measurement mode)
Limits
Min.
Max.
tc(AD)
__________
ADTRG
input cycle time (minimum allowable trigger)
1000
ns
tw(ADL)
__________
ADTRG
input low-level pulse width
125
ns
Unit
Symbol
Parameter
A-D trigger input
Unit
Symbol
Parameter
Serial I/O
Limits
Min.
Max.
tw(INH)
_______
INTi
input high-level pulse width
250
ns
tw(INL)
______
INTi
input low-level pulse width
250
ns
tw(KIL)
____
KIi
input low-level pulse width
250
ns
Unit
Symbol
Parameter
Limits
Min.
Max.
tc(CK)
CLKi input cycle time
200
ns
tw(CKH)
CLKi input high-level pulse width
100
ns
tw(CKL)
CLKi input low-level pulse width
100
ns
td(C–Q)
TXDi output delay time
80
ns
th(C–Q)
TXDi hold time
0ns
tsu(D–C)
RXDi input setup time
30
ns
th(C–D)
RXDi input hold time
90
ns
Limits
Min.
Max.
tc(TB)
TBiIN input cycle time (Note)
320
ns
tw(TBH)
TBiIN input high-level pulse width (Note)
160
ns
tw(TBL)
TBiIN input low-level pulse width (Note)
160
ns
Unit
Symbol
Parameter
Timer B input (Pulse width measurement mode)
Unit
Symbol
Parameter
A-D trigger input
Unit
Symbol
Parameter
Serial I/O
Unit
Symbol
Parameter
______
____
External interrupt INTi input, key input interrupt KIi input
Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.
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