參數(shù)資料
型號: M37754S4CHP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, FINE PITCH, PLASTIC, QFP-100
文件頁數(shù): 11/114頁
文件大小: 1116K
代理商: M37754S4CHP
108
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
φ high-level pulse width, φ low-level pulse width
___
WR output delay time
___
RD output delay time
___
WR low-level pulse width
___
RD low-level pulse width
Address output delay time
____
BHE output delay time
____
BHE output delay time
____
BHE output delay time
Chip select output delay time
Data output delay time
Floating start delay time
ALE output delay time
ALE pulse width
Address hold time
____
BHE hold time
____
BHE hold time
Chip select hold time
Data hold time
Floating release delay time
tw(
φH), tw(φL)
td(
φ1–WR)
td(
φ1–RD)
__
tw(WR)
__
tw(RD)
td(A–WR)
td(A–RD)
td(A–ALE)
td(BHE–WR)
td(BHE–RD)
td(BHE–ALE)
td(CS–WR)
td(CS–RD)
td(CS–ALE)
td(WR–DLQ/DHQ)
tpxz(WR–DLZ/DHZ)
td(ALE–WR)
td(ALE–RD)
tw(ALE)
th(WR–A)
th(RD–A)
td(WR–BHE)
td(RD–BHE)
td(WR–CS)
td(RD–CS)
th(WR–DLQ/DHQ)
tpzx(WR–DLZ/DHZ)
Symbol
Parameter
Unit
ns
– 20
– 25
– 40
– 25
– 40
– 25
– 40
+ 5
– 15
– 10
Min.
f (XIN) = 40 MHz
5
–7
5
25
10
25
10
25
10
30
4
10
15
0
Max.
12
35
Bus timing
data formula
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
2
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
1
× 109
f(XIN)
————
: f(XIN) ≤ 20 MHz when the clock source select bit = “1”.
: f(XIN) = 20 MHz when the clock source select bit = “1”.
<NOTE> External bus timing when internal memory area is accessed (2-
φ access) in high-speed
running
(VCC = 5 V±10 %, VSS = 0 V, Ta = –20 to 85 °C, f(XIN)
≤ 40 MHz when the clock source select bit = “0”)
————
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