參數(shù)資料
型號： M38001M8-XXXSS
廠商： Mitsubishi Electric Corporation
英文描述： Quad Low-Noise High-Speed Precision Operational Amplifier 16-SOIC
中文描述： 8位單片機
文件頁數(shù)： 106/173頁
文件大小： 4203K
代理商： M38001M8-XXXSS
3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
3-4
Note:
When bit 6 of address 001A
16
is “1”. Divide this value by four when bit 6 of address 001A
16
is “0”.
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
to INT
5
input “H” pulse width
INT
0
to INT
5
input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
t
W(RESET)
t
c(X
IN
)
t
WH(X
IN
)
t
WL(X
IN
)
t
c(CNTR)
t
WH(CNTR)
t
WL(CNTR)
t
WH(INT)
t
WL(INT)
t
c(S
CLK
)
t
WH(S
CLK
)
t
WL(S
CLK
)
t
su(R
X
D–S
CLK
)
t
h(S
CLK
–R
X
D)
Symbol
Parameter
Limits
Typ.
Min.
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Table 3.1.4 Timing requirements (1)
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted)
3.1.4 Timing requirements and Switching characteristics
2
125
50
50
200
80
80
80
80
800
370
370
220
100
Max.
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
to INT
5
input “H” pulse width
INT
0
to INT
5
input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
Note:
When bit 6 of address 001A
16
is “1” (clock synchronous mode). Divide this value by four when bit 6 of address 001A
16
is “0” (UART
mode).
Symbol
Parameter
Limits
Typ.
Min.
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Table 3.1.5 Timing requirements (2)
(V
CC
= 3.0 to 4.0 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted)
2
500/
(3 V
CC
–8)
200/
(3 V
CC
–8)
200/
(3 V
CC
–8)
500
230
230
230
230
2000
950
950
400
200
Max.
t
W(RESET)
t
c(X
IN
)
t
WH(X
IN
)
t
WL(X
IN
)
t
c(CNTR)
t
WH(CNTR)
t
WL(CNTR)
t
WH(INT)
t
WL(INT)
t
c(S
CLK
)
t
WH(S
CLK
)
t
WL(S
CLK
)
t
su(R
X
D–S
CLK
)
t
h(S
CLK
–R
X
D)
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