參數(shù)資料
型號： M38006M2-XXXFS
廠商： Mitsubishi Electric Corporation
元件分類： 串行ADC
英文描述： 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-TSSOP 0 to 70
中文描述： 8位單片機(jī)
文件頁數(shù)： 112/173頁
文件大?。?/td> 4203K
代理商： M38006M2-XXXFS
3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
3-10
3.1.8 Timing requirements and Switching characteristics (Extended operating temperature version)
Note:
Bit 6 of address 001A
16
is “1”. Divide this value by four bit 6 of address 001A
16
is “0”.
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
to INT
5
input “H” pulse width
INT
0
to INT
5
input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
t
W(RESET)
t
c(X
IN
)
t
WH(X
IN
)
t
WL(X
IN
)
t
c(CNTR)
t
WH(CNTR)
t
WL(CNTR)
t
WH(INT)
t
WL(INT)
t
c(S
CLK
)
t
WH(S
CLK
)
t
WL(S
CLK
)
t
su(R
X
D–S
CLK
)
t
h(S
CLK
–R
X
D)
Symbol
Parameter
Limits
Typ.
Min.
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
2
125
50
50
200
80
80
80
80
800
370
370
220
100
Max.
Table 3.1.15
Timing requirements (Extended operating temperature version)
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, T
a
= –40 to 85
°
C, unless otherwise noted)
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rise time
Serial I/O clock output fall time
CMOS output rise time (Note 2)
CMOS output fall time (Note 2)
Note1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is “0”.
2:
X
OUT
pin is excluded.
140
30
30
30
30
Symbol
Parameter
Limits
Typ.
Min.
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
c(S
CLK
)
/2–30
t
c(S
CLK
)
/2–30
–30
10
10
Max.
t
WH(S
CLK
)
t
WL(S
CLK
)
t
d(S
CLK
–T
X
D)
t
v(S
CLK
–T
X
D)
t
r(S
CLK
)
t
f(S
CLK
)
t
r(CMOS)
t
f(CMOS)
Test conditions
Fig. 3.1.1
Table 3.1.16
Switching characteristics (Extended operating temperature version)
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, T
a
= –40 to 85
°
C, unless otherwise noted)
相關(guān)PDF資料
PDF描述
M38006M2-XXXHP 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-TSSOP 0 to 70
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