參數資料
型號: M38006M2-XXXFS
廠商: Mitsubishi Electric Corporation
元件分類: 串行ADC
英文描述: 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-TSSOP 0 to 70
中文描述: 8位單片機
文件頁數: 25/173頁
文件大?。?/td> 4203K
代理商: M38006M2-XXXFS
HARDWARE
1-11
3800 GROUP USER’S MANUAL
Fig. 8 Register push and pop at interrupt generation and subroutine call
Table 4. Push and pop instructions of accumulator or processor status register
Accumulator
Processor status register
Push instruction to stack
PHA
PHP
Pop instruction from stack
PLA
PLP
FUNCTIONAL DESCRIPTION
On-going Routine
Execute JSR
M(S)
(PC
H
)
(S)
(S – 1)
M(S)
(PC
L
)
(S)
(S – 1)
Subroutine
(S)
(S + 1)
(PC
L
)
M(S)
(S)
(S + 1)
(PC
H
)
M(S)
Execute RTS
(S)
(S – 1)
M(S)
(PS)
(S)
(S – 1)
Interrupt
Service Routine
(S)
(S + 1)
(PS)
M(S)
(S)
(S + 1)
(PC
L
)
M(S)
Execute RTI
(S)
(S + 1)
(PC
H
)
M(S)
M(S)
(PC
H
)
(S)
(S – 1)
M(S)
(PC
L
)
Interrupt Request
(Note 1)
Store Return Address
on Stack (Note 2)
Restore Return
Address
Restore Contents of
Processor Status
Register
I Flag “0” to “1”
Fetch the Jump
Vector
Store Contents of
Processor Status
Register on Stack
Store Return Address
on Stack (Note 2)
Notes 1 :
The condition to enable the interrupt
Interrupt enable bit is “1”
Interrupt disable flag is “0”
2 :
When an interrupt occurs, the address of the next instruction to be executed is stored in
the stack area. When a subroutine is called, the address one before the next instruction
to be executed is stored in the stack area.
Restore Return
Address
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