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參數(shù)資料
| 型號： | M38073M4-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 52/74頁 |
| 文件大小： | 1182K |
| 代理商： | M38073M4-XXXFP |
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56
MITSUBISHI MICROCOMPUTERS
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
NOTES ON USAGE
Handling of Source Pins
In order to avoid a latch-up occurrence, connect a capacitor suitable
for high frequencies as bypass capacitor between power source pin
(VCC pin) and GND pin (Vss pin) and between power source pin (VCC
pin) and analog power source input pin (AVSS pin). Besides, connect
the capacitor to as close as possible. For bypass capacitor which
should not be located too far from the pins to be connected, a ce-
ramic capacitor of 0.01
F—0.1 F is recommended.
P34 clock output function
In the case of using an I/O port P34 as a clock output function, note
the following : when an output clock frequency is changed during
outputting a clock, the port may feed a noise having a shorter pulse
width than the standard at the switch timing. Besides, it also may
happen at the timing for switching the low-speed mode to the middle/
high-speed mode.
Timer X and timer Y
In the pulse period measurement mode or the pulse width measure-
ment mode for timers X and Y, set the "L" or "H" pulse width of input
signal from CNTR0/CNTR1 pin to 2 cycles or more of a timer count
source.
EPROM version/One Time PROM version
The CNVSS pin is connected to the internal memory circuit block by a
low-ohmic resistance, since it has the multiplexed function to be a
programmable power source pin (VPP pin) as well.
To improve the noise reduction, connect a track between CNVSS pin
and VSS pin or VCC pin with 1 to 10 k
resistance.
The mask ROM version track of port CNVSS has no operational inter-
ference even if it is connected via a resistor.
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