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參數(shù)資料
| 型號： | M38198ECFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 2/63頁 |
| 文件大小： | 870K |
| 代理商： | M38198ECFP |
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7
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 3819 group uses the standard 740 family instruction set. Re-
fer to the table of 740 family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 family instructions are as follows:
The FST, SLW instruction cannot be used.
The MUL, DIV, WIT and STP instruction can be used.
CPU Mode Register
The CPU mode register is allocated at address 003B16. The CPU
mode register contains the stack page selection bit and the inter-
nal system clock selection bit.
Fig. BA-1 Structure of CPU mode register
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1 :
1 0 : Not available
1 1 :
Stack page selection bit
0 : RAM in the zero page is used as stack area
1 : RAM in page 1 is used as stack area
XCOUT drivability selection bit
0 : Low drive
1 : High drive
Port XC switch bit
0 : I/O port function
1 : XCIN-XCOUT oscillating function
Main clock (XIN-XOUT) stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bit
0 : f(XIN)/2 (high-speed mode)
1 : f(XIN)/8 (middle-speed mode)
Internal system clock selection bit
0 : XIN-XOUT selected (middle/high-speed mode)
1 : XCIN-XCOUT selected (low-speed mode)
b7
CPU mode register
(CPUM (CM) : address 003B 16)
b0
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