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參數(shù)資料
| 型號： | M38199MF-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 19/63頁 |
| 文件大小： | 870K |
| 代理商： | M38199MF-XXXFP |
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23
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. GA-1 Serial I/O block diagram
S
CLK1
1/8
1/128
1/64
1/32
1/16
SI/O automatic
transfer RAM
(0F0016 to 0F1F16)
Main data
bus
Local data
bus
Main
address bus
Local
address bus
SI/O automatic
transfer
controller
SI/O automatic
transfer data
pointer
Serial I/O automatic
transfer interrupt request
SI/O automatic transfer
interval register
1/256
Internal synchronous
clock selection bit
Synchronous
clock selection
bit
“1”
“0”
Internal
system clock
selection bit
External clock
(Note)
SRDY1
P67 latch
CS
Serial I/O counter 1(3)
Serial I/O shift register 1(8)
“0”
P66 latch
“1”
Serial I/O1 port selection bit
P65 latch
“0”
“1”
Serial I/O1 port selection bit
Address decorder
Synchronization
circuit
Frequency
divider
Serial I/O1
interrupt request
“0”
“1”
XIN
XCIN
P66/SCLK11
P65/SOUT1
P64/SIN1
P67/SRDY1/
CS/SCLK12
S
CLK2
1/8
1/128
1/64
1/32
1/16
1/256
Internal synchronous
clock selection bit
Synchronous
clock selection
bit
“1”
“0”
External clock
SRDY2
P53 latch
SRDY2 output selection bit
Serial I/O counter 2(3)
Serial I/O shift register 2(8)
“0”
“1”
Serial I/O2 port selection bit
P51 latch
“0”
“1”
Serial I/O2 port selection bit
Frequency
divider
Serial I/O2
interrupt request
“0”
P52/SCLK2
P51/SOUT2
P50/SIN2
P53/SRDY2
“1”
Synchronization
circuit
P52 latch
S
CLK3
1/8
1/128
1/64
1/32
1/16
1/256
Internal synchronous
clock selection bit
“1”
“0”
External clock
SRDY3
P57 latch
SRDY2 output selection bit
Serial I/O counter 3(3)
Serial I/O shift register 3(8)
“0”
“1”
Serial I/O3 port selection bit
P55 latch
“0”
“1”
Serial I/O3 port selection bit
Frequency
divider
Serial I/O3
interrupt request
“0”
P56/SCLK3
P55/SOUT3
P54/SIN3
P57/SRDY3
“1”
Synchronization
circuit
P56 latch
Note: Selected with the synchronous clock selection bit, SRDY1 output selection bit, serial I/O1 port selection bit (these 3 bits are of the serial
I/O1 control register), automatic transfer control bit, and synchronous clock output pin selection bit (these 2 bits are ofthe serial I/O
automatic transfer register).
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