參數(shù)資料
型號(hào)： M38207E8-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP80
封裝： 0.50 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù)： 58/69頁(yè)
文件大?。?/td> 944K
代理商： M38207E8-XXXHP
Rev.4.01
Nov 14, 2003
page 61 of 136
3803/3804 Group
Fig. 52 Structure of serial I/O3 control registers
b7
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: (OE) U (PE) U (FE)=0
1: (OE) U (PE) U (FE)=1
Not used (returns “1” when read)
Serial I/O3 status register
Serial I/O3 control register
b0
BRG count source selection bit (CSS)
0: f(XIN) (f(XCIN) in low-speed mode)
1: f(XIN)/4 (f(XCIN)/4 in low-speed mode)
Serial I/O3 synchronous clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronous
serial I/O is selected, BRG output divided by 16
when UART is selected.
1: External clock input when clock synchronous serial
I/O is selected, external clock input divided by 16
when UART is selected.
SRDY3 output enable bit (SRDY)
0: P37 pin operates as normal I/O pin
1: P37 pin operates as SRDY3 output pin
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O3 mode selection bit (SIOM)
0: Clock asynchronous (UART) serial I/O
1: Clock synchronous serial I/O
Serial I/O3 enable bit (SIOE)
0: Serial I/O disabled
(pins P34 to P37 operate as normal I/O pins)
1: Serial I/O enabled
(pins P34 to P37 operate as serial I/O pins)
b7
UART3 control register
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P35/TXD3 P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open drain output (in output mode)
Not used (return “1” when read)
b0
(SIO3STS : address 003116)
(SIO3CON : address 003216)
(UART3CON : address 003316)
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參數(shù)描述
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