Page
Previous change
After change
Corrections and Supplementary Explanation for “3820/3822/3825 Group User’s Manuals” No.1
3820 Group User’s Manual P2-66
3822 Group User’s Manual P2-65
3825 Group User’s Manual P2-65
(1) Timer X
s Timer mode
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before setting below, clear the timer X interrupt enable bit and
the timer X interrupt request bit to “0”.
After setting below, set the timer X interrupt enable bit to “1”
(interrupts enabled).
M380-14-9907
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before timer X stops counting (before setting below), clear the
timer X interrupt enable bit to “0”.
After setting below, clear the timer X interrupt request bit to “0”
and next set the timer X interrupt enable bit to “1” (interrupt en-
abled).
Set last.
3820 Group User’s Manual P2-67
3822 Group User’s Manual P2-66
3825 Group User’s Manual P2-66
(1) Timer X
s Pulse output mode
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before setting below, clear the interrupt enable bits (timer X or
CNTR0) and the interrupt request bits (timer X or CNTR0) to “0”.
After setting below, set the interrupt enable bits (timer X or
CNTR0) to “1” (interrupts enabled).
After change
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before timer X stops counting (before setting below), clear the
interrupt enable bit (timer X or CNTR0) to “0”.
After setting below, clear the interrupt request bit (timer X or
CNTR0) to “0” and next set the interrupt enable bit (timer X or
CNTR0) to “1” (interrupt enabled).
Set last.
Previous change
3820 Group User’s Manual P2-68
3822 Group User’s Manual P2-67
3825 Group User’s Manual P2-67
(1) Timer X
s Event counter mode
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before setting below, clear the interrupt enable bits (timer X or
CNTR0) and the interrupt request bits (timer X or CNTR0) to “0”.
After setting below, set the interrupt enable bits (timer X or
CNTR0) to “1” (interrupts enabled).
After change
[Notes on use]
Notes 1: For using interrupt processing, set the following:
Before timer X stops counting (before setting below), clear the
interrupt enable bit (timer X or CNTR0) to “0”.
After setting below, clear the interrupt request bit (timer X or
CNTR0) to “0” and next set the interrupt enable bit (timer X or
CNTR0) to “1” (interrupt enabled).
Set last.
Previous change
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