參數(shù)資料
型號： M38258MCDXXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 33/73頁
文件大?。?/td> 1323K
代理商： M38258MCDXXXFP
Rev.2.02
Jun 19, 2007
page 37 of 73
REJ03B0146-0202
3823 Group
Fig. 32 Structure of serial I/O control registers
BRG count source selection bit (CSS)
0: f(XIN) (f(SUB) in low-speed mode)
1: f(XIN)/4 (f(SUB)/4 in low-speed mode)
Serial I/O synchronization clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronized serial
I/O is selected.
BRG output divided by 16 when UART is selected.
1: External clock input when clock synchronized serial I/O is
selected.
External clock input divided by 16 when UART is selected.
SRDY, SOUT output enable bit (SRDY)
0: P47 pin operates as ordinary I/O pin
1: P47 pin operates as SRDY or SOUT output pin
Set the transmit disable bit and SRDY, SOUT output enable bits
to “0” to disable transmit when selecting SOUT. (Setting
peripheral function extension register is necessary when
selecting SOUT.)
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O mode selection bit (SIOM)
0: Asynchronous serial I/O (UART)
1: Clock synchronous serial I/O
Serial I/O enable bit (SIOE)
0: Serial I/O disabled
(pins P44–P47 operate as ordinary I/O pins)
1: Serial I/O enabled
(pins P44–P47 operate as serial I/O pins)
Serial I/O control register
(SIOCON : address 001A16)
b7b0
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: (OE) U (PE) U (FE) =0
1: (OE) U (PE) U (FE) =1
Not used (returns “1” when read)
Serial I/O status register
(SIOSTS : address 001916)
b7b0
UART control register
(UARTCON : address 001B16)
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P45/TXD, P47/SRDY/SOUT P-channel output disable bit (POFF) (Note)
0: CMOS output (in output mode)
1: N-channel open-drain output (in output mode)
Not used (return “1” when read)
b7
b0
1 : The peripheral function extension register is used to choose P45/TXD, P47/SRDY/SOUT.
2 : f(SUB) is the source oscillation frequency in low-speed mode. f(SUB) shows the oscillation frequency of XCIN or the on-chip oscillator.
Notes
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