參數(shù)資料
型號(hào)： M38258MCDXXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 70/73頁
文件大?。?/td> 1323K
代理商： M38258MCDXXXFP
Rev.2.02
Jun 19, 2007
page 70 of 73
REJ03B0146-0202
3823 Group
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Note : When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note)
Serial I/O output valid time (Note)
Serial I/O clock output rising time
Serial I/O clock output falling time
140
30
Symbol
Parameter
Limits
Min.
ns
Unit
tC (SCLK)/2–30
–30
Typ.
Max.
twH(SCLK)
twL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
tr(SCLK)
tf(SCLK)
(VCC = 1.8 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
ns
Unit
Note : When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note)
Serial I/O output valid time (Note)
Serial I/O clock output rising time
Serial I/O clock output falling time
350
100
Symbol
Parameter
Limits
Min.
tC (SCLK)/2–100
–30
Max.
twH(SCLK)
twL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
tr(SCLK)
tf(SCLK)
Typ.
Fig. 69 Circuit for measuring output switching characteristics
Table 24 Switching characteristics (1)
Table 25 Switching characteristics (2)
Measurement output pin
100 pF
CMOS output
Note: When bit 4 of the UART control register
(address 001B16) is “1”. (N-channel open-
drain output mode)
N-channel open-drain output (Note)
1 k
100 pF
Measurement output pin
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