參數(shù)資料
型號(hào): M38504E6SP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 31/99頁(yè)
文件大小: 1384K
代理商: M38504E6SP
31
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H/A)
Fig. 25 Block diagram of timer X, timer Y, timer 1, and timer 2
Q
Q
1
0
P
2
7
/
C
N
T
R
0
Q
Q
P
4
0
/
C
N
T
R
1
0
1
R
R
1
0
0
1
T
T
P
r
e
s
c
a
l
e
r
X
l
a
t
c
h
(
8
)
P
r
e
s
c
a
l
e
r
X
(
8
)
T
i
m
e
r
X
l
a
t
c
h
(
8
)
T
i
m
e
r
X
(
8
)
T
r
o
e
t
u
i
m
e
e
s
r
b
X
i
i
n
t
e
r
r
u
p
t
q
t
t
Toggle flip-flop
Timer X count stop bit
P
m
m
l
s
a
d
e
s
e
u
w
r
i
d
m
t
h
e
e
o
e
n
t
Event
counter
mode
T
r
o
e
C
u
N
e
T
t
R
0
b
i
n
t
e
r
r
u
p
t
q
s
i
t
P
u
l
s
e
o
u
t
p
u
t
m
o
d
e
P
l
a
o
r
t
h
P
2
7
t
c
Port P2
7
direction register
C
b
e
d
i
T
e
R
0
s
a
l
c
t
i
t
v
i
e
o
g
e
e
c
n
t
T
P
i
m
u
e
s
r
X
o
l
a
t
p
t
c
u
h
t
m
w
r
i
d
t
e
e
p
u
l
s
e
l
e
u
o
T
P
i
m
u
e
s
r
m
o
o
t
d
p
e
u
l
e
u
t
m
o
d
e
Prescaler Y latch (8)
Prescaler Y (8)
T
i
m
e
r
Y
l
a
t
c
h
(
8
)
Timer Y (8)
T
r
o
e
t
u
i
m
e
e
s
r
b
Y
i
i
n
t
e
r
r
u
p
t
q
t
t
T
o
g
g
l
e
f
l
i
p
-
f
l
o
p
T
i
m
e
r
Y
c
o
u
n
t
s
t
o
p
b
i
t
To CNTR
1
interrupt
request bit
Pulse output mode
P
l
a
o
r
t
h
P
4
0
t
c
Port P4
0
direction register
CNTR
active
edge selection
bit
Timer Y latch write pulse
Pulse output mode
Timer mode
Pulse output mode
D
a
t
a
b
u
s
D
a
t
a
b
u
s
Prescaler 12 latch (8)
P
r
e
s
c
a
l
e
r
1
2
(
8
)
Timer 1 latch (8)
Timer 1 (8)
Data bus
Timer 2 latch (8)
Timer 2 (8)
To timer 2 interrupt
request bit
To timer 1 interrupt
request bit
C
s
N
e
T
e
R
0
c
t
a
o
c
t
i
i
v
t
e
e
d
g
e
l
i
n
b
CNTR
1
active edge
selection bit
Pulse width
measure-
ment mode
E
c
m
v
o
e
u
o
n
n
d
t
t
e
r
e
f(
X
C
I
N
)
T
i
m
e
r
1
2
c
o
u
n
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
f(X
IN
)d
e
d
m
IN
)/2
Timer Y count source selection bit
f(X
IN
)d
e
d
m
f(
X
I
d
m
N
)
o
/
e
2
T
i
m
e
r
X
c
o
u
n
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
f(
d
X
I
e
N
)
m
/
d
1
6
e
(f
(
X
C
I
N
)
/
1
6
a
t
l
o
w
-
s
p
e
o
)
(f
(
X
C
I
N
)
/
2
a
t
l
o
w
-
s
p
e
e
d
)
(f
(
X
C
I
N
)
/
1
6
a
t
l
o
w
-
s
p
e
o
e
)
(f(X
CIN
)/2 at low-speef(X
(f
(
X
C
I
N
)
/
1
6
a
t
l
o
w
-
s
p
e
o
e
)
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