- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370953 > M38507F8SP (Mitsubishi Electric Corporation) Circular Connector; No. of Contacts:19; Series:; Body Material:Aluminum; Connector Shell Size:14; Circular Contact Gender:Pin; Circular Shell Style:Right Angle Plug; Insert Arrangement:14-19 PDF資料下載
參數(shù)資料
| 型號： | M38507F8SP |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:19; Series:; Body Material:Aluminum; Connector Shell Size:14; Circular Contact Gender:Pin; Circular Shell Style:Right Angle Plug; Insert Arrangement:14-19 |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 12/52頁 |
| 文件大?。?/td> | 807K |
| 代理商： | M38507F8SP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
12
3850 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
INTERRUPTS
Interrupts occur by 14 sources among 14 sources: six external,
seven internal, and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the
corresponding interrupt request and enable bits are “1” and the in-
terrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The BRK instruction cannot be disabled with any flag or bit. The I
(interrupt disable) flag disables all interrupts except the BRK in-
struction interrupt.
When several interrupts occur at the same time, the interrupts are
received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are auto-
matically performed:
1. The contents of the program counter and the processor status
register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
3. The interrupt jump destination address is read from the vector
table into the program counter.
I
Notes
When the active edge of an external interrupt (INT
0
–INT
3
, CNTR
0
,
CNTR
1
) is set, the corresponding interrupt request bit may also be
set. Therefore, take the following sequence:
1. Disable the interrupt
2. Change the interrupt edge selection register
(the timer XY mode register for CNTR
0
and CNTR
1
)
3. Clear the interrupt request bit to “0”
4. Accept the interrupt.
相關PDF資料 |
PDF描述 |
|---|---|
| M38503M14H-700FP | NO-NIK KIT SCA-NN175-KIT |
| M38503M2-400FP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38503M2-403FP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38503M2-410FP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38503E4FP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M3851 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 1000' |
| M3851 BK002 | 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 500' |
| M3851 BK005 | 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 100' |
| M38510/00102BCB | 制造商:n/a 功能描述:38510/00102 S6I6B 制造商: 功能描述: 制造商:undefined 功能描述: |
| M38510/00103BCA | 制造商:QP Semiconductor 功能描述:NAND GATE, TRIPLE 3-INPUT |
發(fā)布緊急采購，3分鐘左右您將得到回復。