參數資料
型號: M38B79FFFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數: 106/109頁
文件大小: 1559K
代理商: M38B79FFFP
106
38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
Table 30 Switching characteristics
(V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, T
a
=
20 to 85
°
C, unless otherwise noted)
Serial I/O clock output
H
pulse width
Serial I/O clock output
L
pulse width
Serial I/O1 output delay time
(Note 1)
Serial I/O1 output valid time
(Note 1)
Serial I/O2 output delay time
(Note 2)
Serial I/O2 output valid time
(Note 2)
Serial I/O3 output delay time
(Note 3)
Serial I/O3 output valid time
(Note 3)
Serial I/O clock output rising time
Serial I/O clock output falling time
P-channel high-breakdodwn-voltage output
rising time
(Note 4)
P-channel high-breakdodwn-voltage output
rising time
(Note 5)
t
WH
(S
CLK
)
t
WL
(S
CLK
)
t
d
(S
CLK1
-S
OUT1
)
t
V
(S
CLK1
-S
OUT1
)
t
d
(S
CLK2
-TxD)
t
V
(S
CLK2
-TxD)
t
d
(S
CLK3
-S
OUT3
)
t
V
(S
CLK3
-S
OUT3
)
t
r
(S
CLK
)
t
f
(S
CLK
)
t
r
(Pch
strg)
t
r
(Pch
weak)
Limits
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
Parameter
Min.
t
C
(S
CLK
)/2
160
t
C
(S
CLK
)/2
160
0
30
0
Typ.
55
1.8
Max.
200
140
200
40
40
Symbol
Unit
Notes 1:
When the PB
5
/S
OUT1
P-channel output disable bit of the serial I/O1 control register (bit 7 of address 001A
16
) is
0
.
2:
When the P6
5
/TxD P-channel output disable bit of the UART control register (bit 4 of address 0038
16
) is
0
.
3:
When the P9
1
/S
OUT3
P-channel output disable bit of the serial I/O3 control register (bit 7 of address 0EEC
16
) is
0
.
4:
When the high-breakdown voltage port drivability selection bit of the FLDC mode register (bit 7 of address 0EF4
16
) is
0
.
5:
When the high-breakdown voltage port drivability selection bit of the FLDC mode register (bit 7 of address 0EF4
16
) is
1
.
Test conditions
C
L
= 100 pF
C
L
= 100 pF
C
L
= 100 pF
C
L
= 100 pF
C
L
= 100 pF
V
EE
= Vcc
43 V
C
L
= 100 pF
V
EE
= Vcc
43 V
Fig. 102 Circuit for measuring output switching characteristics
P
P
P
P
6
6
/
6
7
/
9
2
/
B
0
/
S
C
S
C
S
C
S
C
L
L
L
L
K
K
K
K
2
2
3
,
1
1
,
2
,
P
P
0
4
,
,
P
P
1
5
,
,
P
P
2
6
0
,
P
3
P
,
6
3
P
B
4
/
S
C
L
K
1
1
2
,
C
L
C
L
V
E
E
S
e
r
i
a
l
I
/
O
c
l
o
c
k
o
u
t
p
u
t
p
o
r
t
H
P
i
-
g
c
h
h
-
a
b
n
r
e
n
a
e
k
l
d
o
o
p
w
e
n
n
d
v
o
r
a
l
t
i
a
n
g
o
e
u
-
t
p
u
t
p
o
r
t
(
N
o
t
e
)
N
o
t
e
:
P
o
r
t
s
P
4
,
P
5
,
P
6
0
P
6
3
n
e
e
d
e
x
t
e
r
n
a
l
r
e
s
i
s
t
o
r
s
.
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