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參數(shù)資料
| 型號： | M38B79MFH-A055FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 51/109頁 |
| 文件大?。?/td> | 1559K |
| 代理商： | M38B79MFH-A055FP |
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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
51
Data Setup
(1) 16-timing
ordinary mode
The area of addresses 0E70
16
to 0EDF
16
are used as a FLD au-
tomatic display RAM.
When data is stored in the FLD automatic display RAM, the last
data of FLD port P6 is stored at address 0E70
16
, the last data of
FLD port P5 is stored at address 0E80
16
, the last data of FLD port
P4 is stored at address 0E90
16
, the last data of FLD port P3 is
stored at address 0EA0
16
, the last data of FLD port P1 is stored at
address 0EB0
16
, the last data of FLD port P0 is stored at address
0EC0
16
, and the last data of FLD port P2 is stored at address
0ED0
16
, to assign in sequence from the last data respectively.
The first data of the FLD port P6, P5, P4, P3, P1, P0, and P2 is
stored at an address which adds the value of (the timing number
–
1) to the corresponding addresses 0E70
16
, 0E80
16
, 0E90
16
,
0EA0
16
, 0EB0
16
, 0EC0
16
and 0ED0
16
.
Set the FLD data pointer reload register to the value given by (the
timing number
–
1).
Fig. 51 Example of using FLD automatic display RAM in 16-timing
ordinary mode
(2) 16-timing
gradation display mode
Display data setting is performed in the same way as that of the
16-timing
ordinary mode. Gradation display control data is ar-
ranged at an address resulting from subtracting 0070
16
from the
display data store address of each timing and pin. Bright display is
performed by setting
“
0
”
, and dark display is performed by setting
“
1
”
.
(3) 32-timing Mode
The area of addresses 0E00
16
to 0EDF
16
is used as a FLD auto-
matic display RAM.
When data is stored in the FLD automatic display RAM, the last
data of FLD port P6 is stored at address 0E00
16
, the last data of
FLD port P5 is stored at address 0E20
16
, the last data of FLD port
P4 is stored at address 0E40
16
, the last data of FLD port P3 is
stored at address 0E60
16
, the last data of FLD port P1 is stored at
address 0E80
16
, the last data of FLD port P0 is stored at address
0EA0
16
, and the last data of FLD port P2 is stored at address
0EC0
16
, to assign in sequence from the last data respectively.
The first data of the FLD port P6, P5, P4, P3, P1, P0, and P2 is
stored at an address which adds the value of (the timing number
–
1) to the corresponding addresses 0E00
16
, 0E20
16
, 0E40
16
,
0E60
16
, 0E80
16
, 0EA0
16
and 0EC0
16
.
Set the FLD data pointer reload register to the value given by (the
timing number
–
1).
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