參數(shù)資料
型號: M38B79MFH-A055FP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 58/109頁
文件大?。?/td> 1559K
代理商: M38B79MFH-A055FP
38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
58
Toff2 SET/RESET Switch Function
In gradation display mode, the values set by the Toff2 time set reg-
ister (TOFF2) are effective. When the Toff2 SET/RESET switch bit
of FLD output control register (bit 7 of address 0EFC
16
) is
0
,
RAM data is output to the FLD output ports (SET) at the time that
is set by TOFF1 and it is turned to
0
(RESET) at the time that is
set by TOFF2.
When Toff2 SET/RESET switch bit is
1
, RAM data is output
(SET) at the time that is set by TOFF2 and it is turned to
0
(RE-
SET) when the Tdisp time expires.
I
Note
In the case of gradation display mode and dark display, the Toff
section generate/nothing function is disabled.
Toff Section Generate/Nothing Function
The function is for reduction of useless noises which generated as
every switching of ports, because of the combined capacity of
among FLD ports. When the continuous data is output to each
FLD port, the Toff1 section of the continuous parts is not gener-
ated. (See Figure 58)
Fig. 58 Toff section generating/nothing function
If it needs Toff1 section on FLD pulses, set the generating /not of
CMOS port Toff section selection bit (bit 5 of address 0EFC
16
) to
1
and set the generating /not of high-breakdown-voltage port Toff
section selection bit to
1
.
High-breakdown-voltage ports (P2, P0, P1, P3, P4, P5, P6
3
to
P6
0
, total 52 pins) generate Toff1 section by setting the generating
/not of high-breakdown-voltage port Toff section selection bit to
1
.
The CMOS ports (P6
4
to P6
7
, total 4 pins ) generate Toff1 section
by setting the generating /not of CMOS port Toff section selection
bit to
1
.
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