參數(shù)資料
型號: M38D24G6FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 64/138頁
文件大小: 2880K
代理商: M38D24G6FP
Rev.3.02
Apr 10, 2008
Page 29 of 131
REJ03B0177-0302
38D2 Group
Key Input Interrupt (Key-on Wake-Up)
A key input interrupt request is generated by detecting the falling
edge from any pin of ports P00
P03, P54P57 that have been set
to input mode. In other words, it is generated when AND of input
level goes from “1” to “0”. An example of using a key input
interrupt is shown in Figure 21, where an interrupt request is
generated by pressing one of the keys consisted as an active-low
key matrix which inputs to ports P54
P57.
Fig. 21 Connection example when using key input interrupt
Port P54
latch
Port P54
direction register = “0”
Port P55
latch
Port P55
direction register = “0”
Port P56
latch
Port P56
direction register = “0”
Port P57
latch
Port P57
direction register = “0”
Port P00
latch
Port P00
direction register = “1”
Port P01
latch
Port P01
direction register = “1”
Port P02
latch
Port P02
direction register = “1”
Port P03
latch
Port P03
direction register = “1”
P54 input
P55 input
P56 input
P57 input
P00 output
P01 output
P02 output
P03 output
PULL register
Bit 5 = “1”
Port P0
Input reading circuit
Key input interrupt request
Port PXx
“L” level output
P-channel transistor for pull-up
CMOS output buffer
Port P5 Input
reading circuit
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Segment output
disable register 0
Bit 3 = “1”
Segment output
disable register 0
Bit 2 = “1”
Segment output
disable register 0
Bit 1 = “1”
Segment output
disable register 0
Bit 0 = “1”
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