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參數(shù)資料
| 型號： | M41ST84 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 OR 3.0V, 512 bit (64 x 8) Serial RTC with supervisory functions(具有監(jiān)控功能的5.0V或3.0V，512位(64 x 8)串行RTC) |
| 中文描述： | 5.0或3.0V，512位（64 × 8）（具有監(jiān)控功能的5.0V或3.0V，512位（64 × 8）串行時鐘監(jiān)督職能的串行時鐘） |
| 文件頁數(shù)： | 14/31頁 |
| 文件大小： | 181K |
| 代理商： | M41ST84 |
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M41ST84Y, M41ST84W
14/31
Data Retention Mode
With valid V
CC
applied, the M41ST84Y/W can be
accessed as described above with READ or
WRITE cycles. Should the supply voltage decay,
the M41ST84Y/W will automatically deselect,
write protecting itself when V
CC
falls between
V
PFD
(max) and V
PFD
(min). This is accomplished
by internally inhibiting access to the clock regis-
ters. At thistime, theReset pin (RST) is driven ac-
tive and will remain active until V
CC
returns to
nominal levels. When V
CC
falls below the Battery
Back-up Switchover Voltage (V
SO
), power input is
switched from the V
CC
pin to the SNAPHAT
(or
external) battery, and the clock registers and
SRAM are maintained from the attached battery
supply.
All outputs become highimpedance. On powerup,
when V
CC
returns to a nominal value, write protec-
tion continues for t
REC
. The RST signal also re-
mains activeduring this time (see Figure 16, page
14).
For a furthermore detailed review oflifetime calcu-
lations, please see Application Note AN1012.
Figure 16. Power Down/Up Mode AC Waveforms
Table 8. Power Down/Up AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
A
= –40 to 85
°
C; V
CC
= 2.7 to 3.6V or 4.5 to 5.5V (except where noted).
2. V
PFD
(max) toV
PFD
(min) falltime of less than tF may result indeselection/write protection not occurring until 200
μ
s after V
CC
passes
V
PFD
(min).
3. V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
4. Programmable (see Table 13, page 23)
5. At 25
°
C (when using SOH28 + M4T28-BR12SH SNAPHAT top).
Symbol
Parameter
(1)
Min
Typ
Max
Unit
t
F(2)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300
μ
s
t
FB(3)
V
PFD
(min) to V
SS
V
CC
Fall Time
10
μ
s
t
PFD
PFI to PFO Propagation Delay
15
25
μ
s
t
R
V
PFD
(min) to V
PFD
(max) V
CC
Rise Time
10
μ
s
t
RB
V
SS
to V
PFD
(min) V
CC
Rise Time
1
μ
s
t
REC(4)
Power up Deselect Time
2
ms
t
DR(5)
Expected Data Retention Time
10
YEARS
AI03681
VCC
VPFD(max)
INPUTS
(PER CONTROL INPUT)
OUTPUTS
DON’T CARE
HIGH-Z
tF
tFB
tR
tRB
tDR
VALID
VALID
(PER CONTROL INPUT)
RECOGNIZED
RECOGNIZED
VPFD(min)
VSO
tREC
RST
PFO
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST84W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84W_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3 V I2C serial RTC with 44 bytes of NVRAM and supervisory functions |
| M41ST84WMH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84WMH1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84WMH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
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