參數(shù)資料
型號(hào): M464S0924CT1-L1H
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
中文描述: 8Mx64 SDRAM內(nèi)存的SODIMM在8M × 16位,4Banks,4K的刷新,3.3V的同步DRAM的社民黨
文件頁(yè)數(shù): 7/9頁(yè)
文件大小: 105K
代理商: M464S0924CT1-L1H
M464S0924CT1
PC100 SODIMM
Rev. 0.0 April. 2000
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
REFER TO THE INDIVIDUAL COMPONENT, NOT THE WHOLE MODULE.
Parameter
Symbol
-1H
-1L
Unit
Note
Min
Max
Min
Max
CLK cycle time
CAS latency=3
t
CC
10
1000
10
1000
ns
1
CAS latency=2
10
12
CLK to valid output delay
CAS latency=3
t
SAC
6
6
ns
1,2
CAS latency=2
6
7
Output data hold time
CAS latency=3
t
OH
3
3
ns
2
CAS latency=2
3
3
CLK high pulse width
t
CH
3
3
ns
3
CLK low pulse width
t
CL
3
3
ns
3
Input setup time
t
SS
2
2
ns
3
Input hold time
t
SH
1
1
ns
3
CLK to output in Low-Z
t
SLZ
1
1
ns
2
CLK to output in Hi-Z
CAS latency=3
t
SHZ
6
6
ns
CAS latency=2
6
7
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