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參數(shù)資料
| 型號(hào)： | M48T59Y-70MH1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| 中文描述： | 64千位8KB的x8 SRAM的計(jì)時(shí)器 |
| 文件頁(yè)數(shù)： | 10/17頁(yè) |
| 文件大?。?/td> | 135K |
| 代理商： | M48T59Y-70MH1 |
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DATA RETENTION MODE
With valid V
CC
applied, the M48T58/58Y operates
as a conventional BYTEWIDE static RAM. Should
the supply voltage decay, the RAM will automat-
ically power-fail deselect, write protecting itself
when V
CC
falls within the V
PFD
(max), V
PFD
(min)
window. All outputs become high impedance, and
all inputs are treated as "don’t care."
Note:
A power failure during a write cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM’s
content. At voltages below V
PFD
(min), the user can
be assured the memory will be in a write protected
state, provided the V
CC
fall time is not less than t
F
.
The M48T58/58Y may respond to transient noise
spikes on V
CC
that reach into the deselect window
during the time the device is sampling V
CC
. There-
fore, decoupling of the power supply lines is rec-
ommended.
When V
CC
SO
, the control circuit
switches power to the internal battery which pre-
serves data and powers the clock. The internal
button cell will maintain data in the M48T58/58Y for
an accumulated period of at least 7 years when V
CC
is less than V
SO
. As system power returns and V
CC
rises above V
SO
, the battery is disconnected, and
the power supply is switched to external V
CC
. Write
protection continues until V
CC
reaches V
PFD
(min)
plus t
REC
(min). E1 should be kept high or E2 low
as V
CC
rises past V
PFD
(min) to prevent inadvertent
write cycles prior to system stabilization. Normal
RAM operation can resume t
REC
after V
CC
exceeds
V
PFD
(max).
For more information on Battery Storage Life refer
to the Application Note AN1012.
CLOCK OPERATIONS
Reading the Clock
Updates to the TIMEKEEPER registers should be
halted before clock data is read to prevent reading
data in transition. Because the BiPORT TIME-
KEEPER cells in the RAM array are only data
registers, and not the actual clock counters, updat-
ing the registers can be halted without disturbing
the clock itself.
Updating is halted when a ’1’ is written to the READ
bit, D6 in the Control register (1FF8h). As long as
a ’1’ remains in that position, updating is halted.
After a halt is issued, the registers reflect the count;
that is, the day, date, and the time that were current
at the moment the halt command was issued.
All of the TIMEKEEPER registers are updated si-
multaneously. A halt will not interrupt an update in
progress. Updating is within a second after the bit
is reset to a ’0’.
Setting the Clock
Bit D7 of the Control register (1FF8h) is the WRITE
bit. Setting the WRITE bit to a ’1’, like the READ bit,
halts updates to the TIMEKEEPER registers. The
user can then load them with the correct day, date,
and time data in 24 hour BCD format (see Table
10). Resetting the WRITE bit to a ’0’ then transfers
the values of all time registers (1FF9h-1FFFh) to
the actual TIMEKEEPER counters and allows nor-
mal operation to resume. The FT bit and the bits
marked as ’0’ in Table 10 must be written to ’0’ to
allow for normal TIMEKEEPER and RAM opera-
tion. After the WRITE bit is reset, the next clock
update will occur within one second.
See the Application Note AN923 "TIMEKEEPER
rolling into the 21st century" for information on
Century Rollover.
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
Figure 9. Clock Calibration
10/17
M48T58, M48T58Y
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T59Y-70MH1E | 功能描述:實(shí)時(shí)時(shí)鐘 64K (8Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T59Y-70MH1F | 功能描述:實(shí)時(shí)時(shí)鐘 64K (8Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T59Y-70MH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| M48T59Y-70MH6 | 功能描述:實(shí)時(shí)時(shí)鐘 R 511-M48T59Y-70MH6E RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T59Y-70MH6E | 功能描述:實(shí)時(shí)時(shí)鐘 64K (8Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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