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參數(shù)資料
| 型號： | M48Z35AV-70MH1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 256 Kbit 32Kb x8 ZEROPOWER SRAM |
| 中文描述： | 256千位的32KB的SRAM x8 ZEROPOWER |
| 文件頁數(shù)： | 6/18頁 |
| 文件大小： | 135K |
| 代理商： | M48Z35AV-70MH1 |
M48Z35, M48Z35Y
6/18
Table 8. Power Down/Up AC Characteristics
(T
A
= 0 to 70 °C or –40 to 85 °C)
Symbol
Note: 1. V
PFD
(max) to V
PFD
(min) fall time of less than t
F
may result in deselection/write protection not occurring until 200μs after V
CC
pass-
es V
PFD
(min).
2. V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
3. t
REC
(min) = 20ms for industrial temperature grade (6) device.
Parameter
Min
Max
Unit
t
PD
E or W at V
IH
before Power Down
0
μs
t
F
(1)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300
μs
t
FB
(2)
V
PFD
(min) to V
SS
V
CC
Fall Time
10
μs
t
R
V
PFD
(min) to V
PFD
(max) V
CC
Rise Time
10
μs
t
RB
V
SS
to V
PFD
(min) V
CC
Rise Time
1
μs
t
REC
(3)
V
PFD
(max) to Inputs Recognized
40
200
ms
Figure 5. Power Down/Up Mode AC Waveforms
AI01168C
VCC
VPFD (max)
INPUTS
(PER CONTROL INPUT)
OUTPUTS
DON'T CARE
HIGH-Z
tF
tFB
tR
tPD
tRB
tDR
VALID
VALID
(PER CONTROL INPUT)
RECOGNIZED
RECOGNIZED
VPFD (min)
VSO
tREC
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