參數(shù)資料
型號: M48Z58Y-70PC6TR
廠商: 意法半導(dǎo)體
英文描述: 64 Kbit 8Kb x 8 ZEROPOWER SRAM
中文描述: 64千位的8kB × 8 ZEROPOWER的SRAM
文件頁數(shù): 4/17頁
文件大小: 133K
代理商: M48Z58Y-70PC6TR
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
±
5
μ
A
I
CC
Supply Current
Outputs open
50
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
3
mA
I
CC2
Supply Current (Standby) CMOS
E = V
CC
– 0.2V
3
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.2
V
CC
+ 0.3
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage
I
OH
= –1mA
2.4
V
Table 6. DC Characteristics
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
C
IO (3)
Input Capacitance
V
IN
= 0V
10
pF
Input / Output Capacitance
V
OUT
= 0V
10
pF
Notes:
1. Effective capacitance measured with power supply at 5V.
2. Sampled only, not 100% tested.
3. Outputs deselected.
Table 5. Capacitance
(1, 2)
(T
A
= 25
°
C)
Symbol
Parameter
Min
Typ
Max
Unit
V
PFD
Power-fail Deselect Voltage (M48Z58/58Y)
4.5
4.6
4.75
V
V
PFD
Power-fail Deselect Voltage (M48Z58/58YY)
4.2
4.35
4.5
V
V
SO
Battery Back-up Switchover Voltage
3.0
V
t
DR (2)
Expected Data Retention Time
10
YEARS
Notes:
1. All voltages referenced to V
SS
.
2. At 25
°
C
Table 7. Power Down/Up Trip Points DC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C)
For the 28 lead SOIC, the battery package (i.e.
SNAPHAT) part number is "M4Z28-BR00SH1".
The M48Z58/58Y also has its own Power-fail De-
tect circuit. The control circuitry constantly monitors
the single 5V supply for an out of tolerance condi-
tion. When V
CC
is out of tolerance, the circuit write
protects the SRAM, providing a high degree of data
security in the midst of unpredictable system op-
eration brought on by low V
CC
. As V
CC
falls below
approximately 3V, the control circuitry connects the
battery which maintains data until valid power re-
turns.
DESCRIPTION
(cont’d)
4/17
M48Z58, M48Z58Y
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