參數(shù)資料
型號(hào): M4A3-96/48-7VI
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 27/62頁
文件大?。?/td> 0K
描述: IC CPLD ISP 4A 96MC 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ispMACH® 4A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
宏單元數(shù): 96
輸入/輸出數(shù): 48
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
ispMACH 4A Family
33
BLOCK DIAGRAM – M4A3-256/160, M4A3-256/192
Central
Switch
Matrix
Block B
CLK0–CLK3
Block G
Block J
Block I
Block H
Block A
Block O
Block P
Block C
Block D
Block E
Block F
Block N
Block M
Block L
Block K
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
72 X 98
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
4
OE
16
4
16
32
16
36
4
16
32
36
4
16
4
16
OE
16
32
36
4
16
4
16
OE
4
16
36
32
16
4
16
OE
4
36
32
16
4
16
OE
4
36
32
16
4
16
4
16
36
32
16
4
16
OE
16
4
16
32
16
36
4
OE
16
4
16
32
16
36
4
16
32
36
4
16
4
16
OE
16
32
36
4
16
4
16
OE
4
16
36
32
16
4
16
OE
4
36
32
16
4
16
OE
4
36
32
16
4
16
4
16
36
32
16
4
16
OE
16
4
16
32
16
36
4
OE
17466G-050
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