參數(shù)資料
型號: M4A5-96/48-12VI
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 17/62頁
文件大?。?/td> 0K
描述: IC CPLD ISP 4A 96MC 100TQFP
標準包裝: 90
系列: ispMACH® 4A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 12.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
宏單元數(shù): 96
輸入/輸出數(shù): 48
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
24
ispMACH 4A Family
Figure 17. PAL Block for ispMACH 4A Devices with 1:1 Macrocell-I/O Cell Ratio (except M4A (3,5)-32/32)
MACROCELL
M0
C0
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
M15
B
97
M0
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
O0
O2
O4
O6
O8
O10
O12
O14
M15
I/O
CELL
I/O0
CLOCK
GENERATOR
MACROCELL
CENTRAL
SWITCH
MA
TRIX
MACROCELL
O1
I/O
CELL
I/O1
32
A
0
4
16
C1
C2
I/O
CELL
I/O2
O3
I/O
CELL
I/O3
O5
I/O
CELL
I/O5
O7
I/O
CELL
I/O7
C3
C4
I/O
CELL
I/O4
C5
C6
I/O
CELL
I/O6
C7
C8
I/O
CELL
I/O8
O9
I/O
CELL
I/O9
O11
I/O
CELL
I/O11
C9
C10
I/O
CELL
I/O10
C11
C12
I/O
CELL
I/O12
O13
I/O
CELL
I/O13
O15
I/O
CELL
I/O15
C13
C14
I/O
CELL
INPUT
SWITCH
MATRIX
I/O14
C15
LOGIC
ALLOCA
T
O
R
OUTPUT
SWITCH
MA
TRIX
CLK0
CLK1
CLK2
CLK3
M4A3-64/64
A
B
16
17
18
M4A3-256/160
M4A3-256/192
17466H-41
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