參數資料
型號: M5-128/68-15VI/1
廠商: Lattice Semiconductor Corporation
文件頁數: 34/42頁
文件大小: 0K
描述: IC CPLD ISP 128MC 68IO 100TQFP
標準包裝: 90
系列: MACH® 5
可編程類型: 系統內可編程
最大延遲時間 tpd(1): 15.0ns
電壓電源 - 內部: 4.5 V ~ 5.5 V
宏單元數: 128
輸入/輸出數: 68
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-TQFP(14x14)
包裝: 托盤
4
MACH 5 Family
and both the 3.3-V and the 5-V device versions are in-system programmable through an IEEE 1149.1 Test
Access Port (TAP) interface.
FUNCTIONAL DESCRIPTION
The MACH 5 architecture consists of PAL blocks connected by two levels of interconnect. The block
interconnect provides routing among 4 PAL blocks. This grouping of PAL blocks joined by the block
interconnect is called a segment. The second level of interconnect, the segment interconnect, ties all of the
segments together. The only logic difference between any two MACH 5 devices is the number of segments.
Therefore, once a designer is familiar with one device, consistent performance can be expected across the
entire family. All devices have four clock pins available which can also be used as logic inputs.
The MACH 5 PAL blocks consist of the elements listed below (Figure 2). While each PAL block resembles an
independent PAL device, it has superior control and logic generation capabilities.
I/O cells
Product-term array and Logic Allocator
Macrocells
Register control generator
Output enable generator
I/O Cells
The I/Os associated with each PAL block have a path directly back to that PAL block called
local feedback.
If the I/O is used in another PAL block, the
interconnect feeder assigns a block interconnect line to that
signal. The interconnect feeder acts as an input switch matrix. The block and segment interconnects provide
connections between any two signals in a device. The
block feeder assigns block interconnect lines and local
feedback lines to the PAL block inputs.
Block
Interconnect
4
CLK
Block:
16 MCs
Segment:
4 Blocks
Segment Interconnect
20446G-001
Figure 1. MACH 5 Block Diagram
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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