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參數(shù)資料
| 型號： | M5-128/68-15VI/1 |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPLD ISP 128MC 68IO 100TQFP |
| 標準包裝： | 90 |
| 系列： | MACH® 5 |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 15.0ns |
| 電壓電源 - 內(nèi)部： | 4.5 V ~ 5.5 V |
| 宏單元數(shù)： | 128 |
| 輸入/輸出數(shù)： | 68 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應商設備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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MACH 5 Family
17
BLOCK DIAGRAM — M5(LV)-320/XXX
Macrocells
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Generator
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Generator
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AND
Logic
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Generator
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I/O
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Interconnect
Macrocells
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Logic
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I/O
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Logic
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Allocator
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Generator
64
PT
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I/O
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Interconnect
Macrocells
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I/O
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16
32
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PT
7
2
32
16
Macrocells
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73
AND
Logic
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Logic
Allocator
Control
Generator
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PT
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PT
OE
I/O
Cells
16
32
7
PT
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2
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Control
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I/O
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Logic
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Logic
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Generator
64
PT
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16
I/O
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I/O
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16
32
7
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2
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16
Macrocells
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Logic
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I/O
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Interconnect
S
E
G
M
E
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T
CLK0
CLK1
CLK2
CLK3
4
SEGMENT
0
SEGMENT
4
SEGMENT
2
SEGMENT
1
I 0
I 1
I 2
I 3
Macrocells
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Macrocells
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Allocator
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Generator
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PT
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I/O
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32
7
PT
7
2
32
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Macrocells
Control
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Logic
Array
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Logic
Allocator
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Control
Generator
64
PT
2
PT
OE
16
32
7
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32
16
I/O
Cells
64
x
73
AND
Logic
Array
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Interconnect
IN
T
E
R
C
O
N
E
C
T
SEGMENT
3
20446G-010
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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