參數(shù)資料
型號: M50LPW080N1TG
廠商: 意法半導(dǎo)體
英文描述: 8 Mbit 1Mb x8, Uniform Block 3V Supply Low Pin Count Flash Memory
中文描述: 8兆1兆× 8,統(tǒng)一座3V電源低引腳數(shù)快閃記憶體
文件頁數(shù): 29/44頁
文件大?。?/td> 641K
代理商: M50LPW080N1TG
29/44
M50LPW080
Figure 11. LPC Interface AC Signal Timing Waveforms
Table 23. LPC Interface AC Signal Timing Characteristics
Note: 1. The timing measurements for Active/Float transitions are defined when the current through the pin equals the leakage current spec-
ification.
2. Applies to all inputs except CLK.
Symbol
PCI
Symbol
Parameter
Test Condition
Value
Unit
t
CHQV
t
val
CLK to Data Out
Min
2
ns
Max
11
ns
t
CHQX(1)
t
on
CLK to Active
(Float to Active Delay)
Min
2
ns
t
CHQZ
t
off
CLK to Inactive
(Active to Float Delay)
Max
28
ns
t
AVCH
t
DVCH
t
su
Input Set-up Time
(2)
Min
7
ns
t
CHAX
t
CHDX
t
h
Input Hold Time
(2)
Min
0
ns
AI04431
tCHQV
tCHQX
tCHQZ
tCHDX
VALID
LAD0-LAD3
tDVCH
CLK
VALID OUTPUT DATA
FLOAT OUTPUT DATA
VALID INPUT DATA
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