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參數(shù)資料
| 型號： | M51996AP |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| 中文描述： | 抗輻射高效，5安培開關(guān)穩(wěn)壓器 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大小： | 366K |
| 代理商： | M51996AP |
SWITCHING REGULATOR CONTROL
M51996AP/FP
MITSUBISHI (Dig./Ana. INTERFACE)
( 13
Fig.13 Voltage detector circuit section(DET)
Fig.14 Schmatic diagram of voltage detector circuit section(DET)
-
+
OP
AMP
2.5V
DET
F/B
500
3k
6S
1S
7.1V
7.1V
DET
F/B
3k
500
1S
6S
10S
1.2k
10.8k
10.8k
5.4k
It is necessary to input the sufficient larger current(800μA to
8mA)than I2 for triggering the OVP operation.
The reason to decrease I2 is that it is necessary that Icc at the
OVP rest supply voltage is small.
It is necessary that OVP state holds by circuit current from R1 in
the application example,so this IC has the characteristic of
small Icc at the OVP reset supply voltage(~stand-by current +
20μA)
On the other hand,the circuit current is large in the higher
supply voltage,so the supply voltage of this IC doesn't become
so high by the voltage drop across R1.
This characteristic is shown in Fig.16.
The OVP terminal input current in the voltage lower than the
OVP threshold voltage is based on I2 and the input current in
the voltage higher than the OVP threshold voltage is the sum of
the current flowing to the base of Q3 and the current flowing
from the collector of Q2 to the base.
For holding in the latch state,it is necessary that the OVP
terminal voltage is kept in the voltage higher than V
BE
of Q3.
So if the capacitor is connected between the OVP terminal and
GND,even though Q2 turns on in a moment by the surge
voltage,etc,this latch action does not hold if the OVP terminal
voltage does not become higher than V
BE
of Q3 by charging
this capacitor.
For resetting OVP state,it is necessary to make the OVP
terminal voltage lower than the OVP L threshold voltage or
make Vcc lower than the OVP reset supply voltage.
As the OVP reset voltage is settled on the rather high voltage of
9.0V,SMPS can be reset in rather short time from the switch-off
of the AC power source if the smoothing capacitor is not so
large value.
OVP circuit(over voltage protection circuit)section
Fig.15 Detail diagram of OVP circuit
I
1
100μA
7.8V
8k
12k
400
2.5k
I
2
Q3
Q1
Q2
Vcc
OVP
GND
I1=0 when OVP operates
but it becomes high impedance state when lower than
2.5V DET terminal and F/B terminal have inverting
phase characteristics each other,so it is recommended
to connect the resistor and capacitor in series between
them for phase compensation.It is very important one
can not connect by resistor directly as there is the
voltage difference between them and the capacitor has
the DC stopper function.
OVP circuit is basically positive feedback circuit constructed
by Q2,Q3 as shown in Fig.15.
Q2,Q3 turn on and the circuit operation of IC stops,when the
input signal is applied to OVP terminal.(threshold voltage ~
750mV)
The current value of I2 is about 150μA when the OVP does
not operates but it decreases to about 2μA when OVP
operates.
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