參數(shù)資料
型號: M52D32162A-10TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 1M x 16Bit x 2Banks Synchronous DRAM
中文描述: 2M X 16 SYNCHRONOUS DRAM, 8 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, TSOP2-54
文件頁數(shù): 5/30頁
文件大?。?/td> 784K
代理商: M52D32162A-10TG
ES MT
M52D32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.4
5/30
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0
C
°
~ 70
C
°
)
Version
Parameter
Symbol
Test Condition
CAS
Latency
-7.5
-10
Unit Note
Operating Current
(One Bank Active)
I
CC1
Burst Length = 1
t
RC
t
RC
(min), t
CC
t
CC
(min), I
OL
= 0mA
55
35
mA
1
I
CC2P
CKE
V
IL
(max), t
CC
=15ns
0.3
mA
Precharge Standby
Current in power-down
mode
I
CC2PS
CKE
V
IL
(max), CLK
V
IL
(max), t
CC
=
0.2
mA
I
CC2N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
=15ns
Input signals are changed one time during 30ns
3
mA
Precharge Standby
Current in non
power-down mode
I
CC2NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
1
mA
I
CC3P
CKE
V
IL
(max), t
CC
=15ns
1.5
Active Standby Current
in power-down mode
I
CC3PS
CKE
V
IL
(max), CLK
V
IL
(max), t
CC
=
1
mA
I
CC3N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
=15ns
Input signals are changed one time during 30ns
10
mA
Active Standby Current
in non power-down
mode
(One Bank Active)
I
CC3NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
2.5
mA
Operating Current
(Burst Mode)
Refresh Current
I
CC4
I
OL
= 0Ma, Page Burst
All Band Activated, tCCD = tCCD (min)
70
60
mA
1
I
CC5
t
RC
t
RC
(min)
40
40
mA
2
TCSR range
45
70
C
°
2 Banks
180
200
Self Refresh Current
I
CC6
CKE
0.2V
1 Bank
160
180
uA
Deep Power Down
Current
I
CC7
CKE
0.2V
10
uA
Note:
1.Measured with outputs open. Addresses are changed only one time during t
CC
(min).
2.Refresh period is 64ms. Addresses are changed only one time during t
CC
(min).
相關(guān)PDF資料
PDF描述
M52D32162A-7.5BG 1M x 16Bit x 2Banks Synchronous DRAM
M52D32162A-7.5TG 1M x 16Bit x 2Banks Synchronous DRAM
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