參數(shù)資料
型號: M52D32321A-10BG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 512K x 32Bit x 2Banks Synchronous DRAM
中文描述: 1M X 32 SYNCHRONOUS DRAM, 8 ns, PBGA90
封裝: 8 X 13 MM, LEAD FREE, BGA-90
文件頁數(shù): 23/29頁
文件大小: 707K
代理商: M52D32321A-10BG
ES MT
Write Interrupted by Precharge Command & Write Burst stop Cycle @ Burst Length =Full page
M52D32321A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.3
23/29
*Note:
1. Burst can’t end in full page mode, so auto precharge can’t issue.
2.Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined by
AC parameter of t
RDL
.
DQM at write interrupted by precharge command is needed to prevent invalid write.
Input data after Row precharge cycle will be masked internally.
3.Burst stop is valid at every burst length.
C L O C K
C K E
A D D R
DQ
DQ M
A10/AP
RAa
CAa
CAb
RAa
DAa0 DAa1
DAb1
DAb0
DAb2
Row Active
(A- Bank)
W rite
(A- Bank)
Burst Stop
W rite
(A-Bank)
:Don't Car e
HIGH
DAa2 DAa3 DAa4
DAb3 DAb4 DAb5
Precharge
(A- Bank)
t
B D L
t
RD L
* Not e 2
CS
RAS
CAS
W E
BA
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
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