參數(shù)資料
型號(hào): M58LW064D110ZA6F
廠商: 意法半導(dǎo)體
英文描述: GREEN SMT 0805 9MCD @ 20MA TYP
中文描述: 64兆位(和8Mb × 8,4Mb的x16插槽,統(tǒng)一座)3V電源快閃記憶體
文件頁(yè)數(shù): 16/51頁(yè)
文件大小: 349K
代理商: M58LW064D110ZA6F
M58LW064D
16/51
nal state machine and starts the Program/Erase
Controller. Once the command is issued subse-
quent Bus Read operations read the Status Reg-
ister. See the section on the Status Register for
details on the definitions of the Status Register
bits.
During the Block Protect operation the memory will
only accept the Read Status Register command.
All other commands will be ignored. Typical Block
Protection times are given in Table 9.
The Block Protection bits are non-volatile, once
set they remain set through reset and power-
down/power-up. They are cleared by a Blocks Un-
protect command.
See Appendix C, Figure 20, Block Protect Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Block Protect command.
Blocks Unprotect Command.
The Blocks Un-
protect command is used to unprotect all of the
blocks. Two Bus Write cycles are required to issue
the Blocks Unprotect command; the second Bus
Write cycle starts the Program/Erase Controller.
Once the command is issued subsequent Bus
Read operations read the Status Register. See the
section on the Status Register for details on the
definitions of the Status Register bits.
During the Block Unprotect operation the memory
will only accept the Read Status Register com-
mand. All other commands will be ignored. Typical
Block Protection times are given in Table 9.
See Appendix C, Figure 21, Block Unprotect Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Block Unprotect command.
Protection Register Program Command.
The
Protection Register Program command is used to
Program the 64 bit user segment of the Protection
Register. Two write cycles are required to issue
the Protection Register Program command.
I
The first bus cycle sets up the Protection
Register Program command.
I
The second latches the Address and the Data to
be written to the Protection Register and starts
the Program/Erase Controller.
Read operations output the Status Register con-
tent after the programming has started.
The user-programmable segment can be locked
by programming bit 1 of the Protection Register
Lock location to ‘0’ (see Table 7 and x for Word-
wide and Byte-wide protection addressing). Bit 0
of the Protection Register Lock location locks the
factory programmed segment and is programmed
to ‘0’ in the factory. The locking of the Protection
Register is not reversible, once the lock bits are
programmed no further changes can be made to
the values stored in the Protection Register, see
Figure 6, Protection Register Memory Map. At-
tempting to program a previously protected Pro-
tection Register will result in a Status Register
error.
The Protection Register Program cannot be sus-
pended. See Appendix C, Figure 22, Protection
Register Program Flowchart and Pseudo Code,
for the flowchart for using the Protection Register
Program command.
Configure STS Command.
The Configure STS command is used to configure
the Status/(Ready/Busy) pin. After power-up or re-
set the STS pin is configured in Ready/Busy
mode. The pin can be configured in Status mode
using the Configure STS command (refer to Sta-
tus/(Ready/Busy) section for more details.
Two write cycles are required to issue the Config-
ure STS command.
I
The first bus cycle sets up the Configure STS
command.
I
The second specifies one of the four possible
configurations (refer to Table 5, Configuration
Codes):
– Ready/Busy mode
– Pulse on Erase complete mode
– Pulse on Program complete mode
– Pulse on Erase or Program complete mode
The device will not accept the Configure STS com-
mand while the Program/Erase controller is busy
or during Program/Erase Suspend. When STS pin
is pulsing it remains Low for a typical time of
250ns. Any invalid Configuration Code will set an
error in the Status Register.
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