參數(shù)資料
型號(hào): M58WR032F-ZBF
廠商: 意法半導(dǎo)體
英文描述: CAP 560PF 100V 1% NP0(C0G) AXIAL RAD.20 BULK R-MIL-PRF-20 STANDOFF
中文描述: 32兆位(含2Mb × 16,多銀行,突發(fā))1.8V電源快閃記憶體
文件頁(yè)數(shù): 44/86頁(yè)
文件大?。?/td> 1306K
代理商: M58WR032F-ZBF
M58WR032FT, M58WR032FB
44/86
Table 20. Asynchronous Read AC Characteristics
Note: 1. Sampled only, not 100% tested.
2. G may be delayed by up to t
ELQV
- t
GLQV
after the falling edge of E without increasing t
ELQV
.
Symbol
Alt
Parameter
M58WR032FT/B
Unit
60
70
80
R
t
AVAV
t
RC
Address Valid to Next Address Valid
Min
60
70
80
ns
t
AVQV
t
ACC
Address Valid to Output Valid (Random)
Max
60
70
80
ns
t
AVQV1
t
PAGE
Address Valid to Output Valid (Page)
Max
20
20
25
ns
t
AXQX (1)
t
OH
Address Transition to Output Transition
Min
0
0
0
ns
t
ELTV
Chip Enable Low to Wait Valid
Max
11
14
14
ns
t
ELQV
(2)
t
CE
Chip Enable Low to Output Valid
Max
60
70
80
ns
t
ELQX
(1)
t
LZ
Chip Enable Low to Output Transition
Min
0
0
0
ns
t
EHTZ
Chip Enable High to Wait Hi-Z
Max
14
17
17
ns
t
EHQX (1)
t
OH
Chip Enable High to Output Transition
Min
0
0
0
ns
t
EHQZ
(1)
t
HZ
Chip Enable High to Output Hi-Z
Max
14
17
17
ns
t
GLQV
(2)
t
OE
Output Enable Low to Output Valid
Max
20
20
25
ns
t
GLQX
(1)
t
OLZ
Output Enable Low to Output Transition
Min
0
0
0
ns
t
GHQX (1)
t
OH
Output Enable High to Output Transition
Min
0
0
0
ns
t
GHQZ
(1)
t
DF
Output Enable High to Output Hi-Z
Max
14
14
14
ns
L
t
AVLH
t
AVADVH
Address Valid to Latch Enable High
Min
7
9
9
ns
t
ELLH
t
ELADVH
Chip Enable Low to Latch Enable High
Min
10
10
10
ns
t
LHAX
t
ADVHAX
Latch Enable High to Address Transition
Min
7
9
9
ns
t
LLLH
t
ADVLADVH
Latch Enable Pulse Width
Min
7
9
9
ns
t
LLQV
t
ADVLQV
Latch Enable Low to Output Valid (Random)
Max
60
70
80
ns
t
LHGL
t
ADVHGL
Latch Enable High to Output Enable Low
Min
0
0
0
ns
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