參數(shù)資料
型號: M5M44800CJ-6
廠商: Mitsubishi Electric Corporation
英文描述: FAST PAGE MODE 4194304-BIT (524288-WORD BY 8-BIT) DYNAMIC RAM
中文描述: 快速頁面模式4194304位(524288 - Word的8位)動態(tài)隨機存儲器
文件頁數(shù): 1/21頁
文件大?。?/td> 202K
代理商: M5M44800CJ-6
FFAST PAGE MODE 4194304-BIT (524288-WORD BY 8-BIT) DYNAMIC RAM
M5M44800CJ,TP-5,-6,-7,
M5M44800CJ,TP-5,-5S:Under development
This is a family of 524288-word by 8-bit dynamic RAMs, fabricated
with the high performance CMOS process, and is ideal for large-
capacity memory systems where high speed, low power
dissipation, and low costs are essential.
The use of double-layer metalization process technology and a
single-transistor dynamic storage stacked capacitor cell provide
high circuit density at reduced costs. Multiplexed address inputs
permit both a reduction in pins and an increase in system
densities. Self or extended refresh current is low enough for
battery back-up application.
1
DESCRIPTION
APPLICATION
Microcomputer memory, Refresh memory for CRT
FEATURES
XX=J,TP
Type name
RAS
time
(max.ns)
50
aCAS
time
(max.ns)
13
(mtime
25
access
Address
time
(min.ns)
90
Cycle
dissipa-
(typ.mW)
450
Power
tion
M5M44800CXX-7,-7S
M5M44800CXX-6,-6S
60
70
15
20
30
35
110
130
375
325
15
20
aOE
time
(max.ns)
13
M5M44800CXX-5,-5S
PIN DESCRIPTION
Pin name
A
0
~A
9
DQ
1
~DQ
8
RAS
CAS
W
OE
Vcc
Vss
Function
Address inputs
Data inputs/outputs
Row address strobe input
Column address strobe input
Write control input
Output enable input
Power supply (+5V)
Ground (0V)
-5S,-6S,-7S
PIN CONFIGURATION (TOP VIEW)
Standard 28pin SOJ, 28pin TSOP (II)
Single 5V±10% supply
Low stand-by power dissipation
CMOS lnput level 5.5mW (Max)
CMOS Input level 550μW (Max) *
Operating power dissipation
M5M44800Cxx-5,-5S 495mW (Max)
M5M44800Cxx-6,-6S 413mW (Max)
M5M44800Cxx-7,-7S 358mW (Max)
Self refresh capability *
Self refresh current 150μA(Max)
Extended refresh capability
Extended refresh current 150μA(Max)
Fast page mode(1024-column random access),Read-modify-write,
RAS-only refresh, CAS before RAS refresh, Hidden refresh
capabilities.
Early-write mode, CAS and OE to control output buffer impedance
1024 refresh cycles every 16.4ms (A
0
~A
9
)
1024 refresh cycles every 128ms (A
0
~A
9
) *
* :Applicable to self refresh version (M5M44800CJ,TP-5S,-6S,-7S
:option) only
18
17
16
1
2
3
4
5
6
(5V)V
CC
DQ
1
DQ
2
DQ
3
A
0
A
1
A
2
A
3
V
SS
(0V)
W
RAS
CAS
OE
NC
A
4
V
SS
(0V)
A
7
A
6
A
5
A
8
21
28
27
DQ
8
DQ
7
DQ
6
26
25
19
20
Outline 28P0K(400mil SOJ)
24
23
12
13
11
10
9
A
9
8
22
7
(5V)V
CC
14
15
DQ
4
NC
DQ
5
18
17
16
1
2
3
4
5
6
(5V)V
CC
DQ
1
DQ
2
DQ
3
A
0
A
1
A
2
A
3
V
SS
(0V)
W
RAS
CAS
OE
NC
A
4
V
SS
(0V)
A
7
A
6
A
5
A
8
21
28
27
DQ
8
DQ
7
DQ
6
26
25
19
20
Outline 28P3Y-H(400mil TSOP Normal Bend)
24
23
12
13
11
10
9
A
9
8
22
7
(5V)V
CC
14
15
DQ
4
NC
DQ
5
NC:NO CONNECTION
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M5M44800CJ-7S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 4194304-BIT (524288-WORD BY 8-BIT) DYNAMIC RAM
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