參數(shù)資料
型號: M5M4V16G50DFP-10
廠商: Mitsubishi Electric Corporation
英文描述: 16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
中文描述: 1,600(2 -銀行甲262144字× 32位)同步圖形RAM
文件頁數(shù): 32/33頁
文件大?。?/td> 167K
代理商: M5M4V16G50DFP-10
M5M4V16G50DFP -8, -10, -12
Jan'97
Preliminary
MITSUBISHI LSIs
16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
MITSUBISHI ELECTRIC
SGRAM (Rev. 0.0)
AC TIMING REQUIREMENTS
(Ta=0 ~ 70°C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, unless otherwise noted)
Input Pulse Levels : 0.8V to 2.0V
Input Timing Measurement Level : 1.4V
Symbol Parameter
Limits
-8
-10
Min.
Max.
Min.
Max.
tCLK
CLK cycle time
CL=2
12
15
CL=3
8
10
tCH
CLK High pulse width
3
3.5
tCL
CLK Low pulse width
3
3.5
tT
Transition time of CLK
1
10
1
10
tIS
2.5
2.5
tIH
1
1
tRC
Row Cycle time
96
100
tRCD
Row to Column Delay
24
30
tRAS
Row Active time
70
10000
70
10000
tRP
Row Precharge time
30
30
tWR
Write Recovery time
8
10
tRRD
Act to Act Delay time
30
30
tRSC
Mode Register Set
Cycle time
16
20
tPDE
Power Down Exit time
8
12
tREF
Refresh Interval time
32
32
CLK
Signal
1.4V
1.4V
Any AC timing is
referenced to the input
signal crossing through
1.4V.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
-12
Min.
Max.
18
12
4
4
1
10
3
1.5
120
36
84
10000
36
12
36
24
15
32
tBWC
Block Write Cycle time
16
20
ns
24
tBPL
8
10
ns
12
Input Setup time (all inputs)
Input Hold time (all inputs)
Block Write to Precharge
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M5M4V16G50DFP-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
M5M4V16G50DFP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
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