參數(shù)資料
型號(hào): M5M5Y5636TG-20
廠商: Mitsubishi Electric Corporation
英文描述: 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
中文描述: 18874368位(524288 - Word的36位)網(wǎng)絡(luò)的SRAM
文件頁(yè)數(shù): 17/27頁(yè)
文件大?。?/td> 212K
代理商: M5M5Y5636TG-20
MITSUBISHI LSIs
M5M5Y5636TG – 25,22,20
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
17
MITSUBISHI
ELECTRIC
Advanced Information
M5M5Y5636TG REV.0.0
(2)TIMING CHARACTERISTICS
Limits
225MHz
-22
Min
250MHz
-25
Min
200MHz
-20
Min
Symbol
Parameter
Max
Max
Max
Unit
Clock
t
KHKH
t
KHKL
t
KLKH
Output times
t
KHQV
t
KHQX
t
KHQX1
t
KHQZ
t
CHCL
t
CLCH
t
KHCH
t
KLCL
t
KHCX1
t
KHCZ
t
CHQV
t
CHQX
Setup Times
t
AVKH
t
advVKH
t
WVKH
t
BxVKH
t
EVKH
t
DVKH
Hold Times
t
KHAX
t
KHadvX
t
KHWX
t
KHBxX
t
KHEX
t
KHDX
Note33. Test conditions is specified with the output loading shown in Fig.1 unless otherwise noted.
Note34. t
KHQX1
, t
KHQZ
, t
KHCX1
, t
KHCZ
are sampled.
Note35. LBO#, EP2, EP3, ZQ is static and must not change during normal operation.
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
4.0
1.5
1.5
4.4
1.6
1.6
5.0
1.8
1.8
ns
ns
ns
Clock HIGH to Output Valid
Clock HIGH to Output Invalid
Clock HIGH to Output in Low-Z
Clock HIGH to Output in High-Z
Echo Clock HIGH Time
Echo Clock LOW Time
Clock HIGH to Echo Clock HIGH
Clock LOW to Echo Clock LOW
Clock HIGH to Echo Clock Low-Z
Clock HIGH to Echo Clock High-Z
Echo Clock HIGH to Output Valid
Output Invalid to Echo Clock HIGH
2.6
2.8
3.2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.5
0.5
0.5
1.25
1.25
0.5
0.5
0.5
0.5
0.6
0.6
0.6
1.35
1.35
0.5
0.5
0.5
0.5
0.7
0.7
0.7
1.55
1.55
0.5
0.5
0.5
0.5
2.6
2.8
3.2
2.5
2.5
2.7
2.7
3.1
3.1
2.5
0.5
-0.5
2.7
0.5
-0.5
3.1
0.5
-0.5
Address Valid to Clock HIGH
ADV Valid to Clock HIGH
Write Valid to Clock HIGH
Byte Write Valid to Clock HIGH (BWa#~BWd#)
Enable Valid to Clock HIGH (E1#,E2,E3)
Data In Valid Clock HIGH
0.8
0.8
0.8
0.8
0.8
0.8
1.0
1.0
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.2
1.2
ns
ns
ns
ns
ns
ns
Clock HIGH to Address don’t care
Clock HIGH to ADV don’t care
Clock HIGH to Write don’t care
Clock HIGH to Byte Write don’t care (BWa#~BWd#)
Clock HIGH to Enable don’t care (E1#,E2,E3)
Clock HIGH to Data In don’t care
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
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