參數(shù)資料
型號: M65617
廠商: Mitsubishi Electric Corporation
英文描述: PICTURE-IN-PICTURE SIGNAL PROCESSING
中文描述: 子母圖像信號處理
文件頁數(shù): 3/15頁
文件大小: 74K
代理商: M65617
MITSUBISHI ICs (TV)
M65617SP
PICTURE-IN-PICTURE SIGNAL PROCESSING
3
DESCRIPTION OF PIN
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
I/O
GND
O
I
O
O
Vdd
Vdd
I
O
O
GND
Vdd
I
O
O
GND
Function
Remarks
AVss3
VCXO out
VCXO in
FILTER
BIAS
AVdd3
AVdd2 (m)
Vin (m)
Vrt (m)
Vrb (m)
AVss2 (m)
AVdd1 (s)
Vin (s)
Vrt (s)
Vrb (s)
AVss1 (s)
(VCXO)
Grounding (analog burst lock PLL section)
Oscillation output signal
Oscillation input signal
Filter
Bias
Power supply (analog burst lock PLL section)
Power supply (analog main signal A/D section)
Main color input signal
Main signal A/D reference voltage output +
Main signal A/D reference voltage output -
Grounding (analog main signal A/D section)
Power supply (analog sub-signal A/D section)
Sub-composite video input signal
Sub-signal A/D reference voltage output +
Sub-signal A/D reference voltage output -
Grounding (analog sub-signal A/D section)
(VCXO)
17
RESET
I
Power-ON reset input signal.
Connected to the power supply with
100k
, and grounded with 10
μ
F
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DVss1
DVdd1
GND
Vdd
(I/)O
I
I(/O)
O
I
I
GND
Vdd
(I/)O
I(/O)
I
(I/)O
I(/O)
Grounding (digital section)
Power supply (digital section)
Sub-screen burst gate pulse output
Sub-screen 4fsc clock input
Sub-screen CSYNC input
I
C bus data/acknowledge output signal
I
C bus data input signal
I
C bus clock input signal
Grounding (digital section)
Power supply (digital section)
For testing
For testing
For testing
For testing
Horizontal sync input signal
BGP(s)/TEST0
SCK
Open
Grounding
Pulldown 15k
CSYNC(s)/TEST1
ACK
DATA
CLK
DVss2
DVdd2
2
2
2
BGP(m)/TEST2
fsc/TEST3
MCK
SWM/TEST4
HD/TEST5
VD/CSYNC/
TEST6
SWMG/TEST7
DVdd3 (ram)
DVss3 (ram)
Cout-sub
ADJ-Csub
Yout-sub
ADJ-Ysub
Y-PIPin
AVss4 (da)
C-PIPin
AVdd4 (da)
C-PIP
TEST8
Y-PIP
TEST9
Yin
TESTEN
Cin
AVssf (ana)
Open
Pulldown 15k
Grounding
Open
33
I(/O)
Vertical sync input signal
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
I(/O)
Vdd
GND
O
O
O
O
I
GND
I
Vdd
O
I
O
I
Sub-screen display authorization input signal
Power supply (digital RAM section)
Grounding (digital RAM section)
Sub-screen color signal D/A output signal
For adjustment of sub-screen color signal D/A
Sub-screen luminance signal D/A output signal
For adjustment of sub-screen luminance signal D/A
Sub-screen luminance signal re-input signal
Grounding (analog D/A and SW sections)
Sub-screen color signal re-input signal
Power supply (analog D/A & SW sections)
PIP color signal output signal
For testing
PIP luminance signal output signal
For testing
Main luminance input signal
For testing
Main color input signal
Grounding (analog section)
Pullup 15k
Pullup 15k
Grounding
I
I
I
Grounding
Vss
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