3
MITSUBISHI
DIGITAL ASSP
M66515FP
LASER-DIODE DRIVER/CONTROLLER
OPERATION
1. Laser Drive Currents
The approximate values of laser drive currents, I
SW
and I
B
,
are obtained by the following equation, in which V
C
is the volt-
age of holding capacitor connected to the C
H
pin.
(1) I
SW
(switching current)
V
C
[V]
R
S
[k
]
I
SW
[mA] = 12
×
provided that 0
≤
V
C
≤
V
CC
– 1.8V and I
SW (max.)
=120mA
where R
S
is the resistance of the resistor connected between
the R
S
pin and GND.
(2) I
B
(bias current)
V
B
[V]
R
B
[k
]
I
B
[mA] = 10
×
provided that 0
≤
V
B
≤
Vcc – 2.7V and I
B (max.)
= 30mA
where R
B
is the resistance of the resistor connected between
the R
B
pin and GND.
2. Switching Operation
If DATA = “L,” the LD drive current is I
SW
+ I
B
; if DATA = “H,”
I
B
.
3. ENB Input
When the laser drive current is controlled by the DATA input,
the M66515’s internal current source is maintained turned on.
In contrast, the control by ENB is turning on and off at the cur-
rent source. If ENB = “L” the current source turns on; if ENB =
“H” off.
When ENB = “H” the C
H
pin is compulsorily fixed to “L” in or-
der to discharge the capacitor connected to the C
H
pin.
4. Internal Reset Function
The M66515 has a reset circuit built in for the protection of
laser from an excessive current flowing at the moment of
power on. The internal current source goes off in the range
Vcc < 3.5V (typ.), and the C
H
pin is compulsorily fixed to “L” at
the same time.
5. RO Pin
A load resistor for laser drive current is connected to the RO
pin, through which a current almost equal to I
SW
flows in
(when DATA = “H”). The load resistor is connected between
the RO pin and Vcc to reduce power dissipated in the IC.
Due to reasons related to the operation of circuits, the voltage
at this pin should be 2.5V or higher.
Consequently, the maximum resistance, RO
(max.)
, of load re-
sistor RO is:
Vcc
(min.)
–2.5 [V]
I
SW(max.)
[A]
RO
(max.)
[
] =
where I
SW(max.)
is the maximum of I
SW
. If, for example,
Vcc
(min.)
= 4.75V and I
SW(max.)
=120mA, RO
(max.)
=18.8
.
Accordingly, if the resistance of R
S
is selected so as to gain
maximum I
SW
of 120mA, RO should be 18.8
at the maxi-
mum.
6. Sample-Hold Circuit
(1) Circuit Operation Overview
The following is an overview of the operation of the sample-
hold circuit contained in the M66515.
The PD current generated by LD illumination flows through
the resistor connected between 1RM and 2RM, thereby gen-
erating a potential difference (V
M
). V
M
is compared with the
voltage applied to the Vr pin. If V
M
< Vr, a constant current is
sourced through the C
H
pin so that the external capacitor is
charged. If V
M
> Vr, a constant current sinks through the C
H
pin to discharge the external capacitor.This operation occurs
when the S/H input is “L” (sample). When the S/H input is “H,”
the C
H
pin is maintained at high impedance state (hold), irre-
spective of the state of V
M
, Vr, and DATA input.
Reference voltage input
Potential difference on resistor RM
V
r
V
M
Comparator
+
Control
circuit
S/H
Sample-hold
control input
ENB
SW1
SW2
C
H
T
r1
Externat capacitor
Constant current
source for charging
Constant current
source for discharging
Output
Conceptual Diagram : Sample-Hold circuit