參數(shù)資料
型號： M95128-MN6TV
廠商： 意法半導體
元件分類： DRAM
英文描述： 128 Kbit Serial SPI bus EEPROM with high speed clock
中文描述： 128千位的SPI高速時鐘總線的EEPROM
文件頁數(shù)： 10/41頁
文件大小： 207K
代理商： M95128-MN6TV
Signal description
M95128, M95128-W, M95128-R
10/41
3.6
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against Write instructions (as specified by the values in the BP1 and BP0 bits of
the Status Register).
This pin must be driven either High or Low, and must be stable during all write instructions.
3.7
Supply voltage (V
CC
)
3.7.1
Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
must be applied: this voltage must be a DC voltage within the specified [V
CC
(min),
V
CC
(max)] range, as defined in
Table 7
,
Table 8
and
Table 9
. In order to secure a stable DC
supply voltage, it is recommended to decouple the V
CC
line with a suitable capacitor (usually
of the order of 10nF to 100nF) close to the V
CC
/V
SS
package pins.
The V
CC
voltage must remain stable and valid until the end of the transmission of the
instruction and, for a Write instruction, until the completion of the internal write cycle (t
W
).
3.7.2
Power-up conditions
When the power supply is turned on, V
CC
rises from V
SS
to V
CC
. During this time, the Chip
Select (S) signal is not allowed to float and must follow the V
CC
voltage. The S line should
therefore be connected to V
CC
via a suitable pull-up resistor.
In addition, the Chip Select (S) input offers a built-in safety feature, as it is both edge
sensitive and level sensitive. Practically this means that after power-up, the device cannot
become selected until a falling edge has first been detected on Chip Select (S). So the Chip
Select (S) signal must first have been High and then gone Low before the first operation can
be started.
3.7.3
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V
CC
), the device will not respond to any
instruction until the V
CC
has reached the Power On Reset threshold voltage (this threshold
is lower than the minimum V
CC
operating voltage defined in
Section 9: DC and AC
parameters
).
When V
CC
has passed the POR threshold voltage, the device is reset and in the following
state:
in Standby Power mode
deselected (at next Power-up, a falling edge is required on Chip Select (S) before any
instructions can be executed)
not in the Hold Condition Status Register state:
–
the Write Enable Latch (WEL) bit is reset to 0
–
the Write In Progress (WIP) bit is reset to 0.
The SRWD, BP1 and BP0 bits of the Status Register are at the same logic level as
when the device was last powered down (they are non-volatile bits).
●
●
●
相關PDF資料
PDF描述
M95128-MN6V 128 Kbit Serial SPI bus EEPROM with high speed clock
M95128-R 128 Kbit Serial SPI bus EEPROM with high speed clock
M95128-RDW3GP 128 Kbit Serial SPI bus EEPROM with high speed clock
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相關代理商/技術參數(shù)
參數(shù)描述
M95128-MN6V 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit Serial SPI bus EEPROM with high speed clock
M95128MW 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock
M95128-MW1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock
M95128-MW3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock
M95128-MW3G 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock
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