參數(shù)資料
型號(hào): M95256-WDW3T/A
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 32K X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.169 INCH, TSSOP-8
文件頁數(shù): 6/43頁
文件大小: 431K
代理商: M95256-WDW3T/A
Instructions
M95256, M95256-W, M95256-R
5.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in Figure 6, to send this instruction to the device, Chip Select (S) is driven Low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven High.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion.
Figure 6.
Write Disable (WRDI) Sequence
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction
相關(guān)PDF資料
PDF描述
M95256-RDW6TG 32K X 8 SPI BUS SERIAL EEPROM, PDSO8
MA-306-29.4912M-K0 QUARTZ CRYSTAL RESONATOR, 29.4912 MHz
MA04206 2-PORT SAW RESONATOR, 433.92 MHz
MA05199 1-PORT SAW RESONATOR, 434.42 MHz
MA1050 1 A SWITCHING REGULATOR, 200 kHz SWITCHING FREQ-MAX, SIP7
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