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參數(shù)資料
| 型號(hào)： | MAC7101MAG40 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 26/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT FLASH 144-LQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | MAC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 32-位 |
| 速度： | 40MHz |
| 連通性： | CAN，I²C，SCI，SPI |
| 外圍設(shè)備： | DMA，POR |
| 輸入/輸出數(shù)： | 112 |
| 程序存儲(chǔ)器容量： | 544KB（544K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.35 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 32x8/10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
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MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
32
3.12 FlexCAN Interface
3.13 Common Flash Module
NOTE
Unless otherwise noted the abbreviation NVM (Non-Volatile Memory) is
used for both program Flash and data Flash.
The time base for all program and data Flash operations, fNVMOP, is derived from the IPS bus clock, fIPS,
using the CFMCLKD register to control the divider ratio. Throughout this section, tIPS refers to 1 ÷ fIPS,
and tNVMOP refers to 1 ÷ fNVMOP. An fNVMOP frequency range limit is imposed for performing program
or erase operations. The CFM does not monitor the frequency and will not prevent program or erase
operation at frequencies above or below the following limits:
Eqn. 19
fNVMOP = 200 KHz gives the fastest program and erase performance. Setting CFMCLKD to a value such
that fNVMOP < 150 KHz should be avoided, as this can damage the Flash memory due to overstress. Setting
CFMCLKD to a value such that fNVMOP > 200 KHz can result in incomplete programming or erasure of
the Flash memory array cells.
3.13.1 Mass Erase Timing
The time required to erase the entire NVM array (both program and data) is calculated using the formula:
Eqn. 20
The setup time can be ignored for this operation.
3.13.2 Blank Check Timing
The time it takes to perform a blank check on the program or data Flash is dependant on the location of the
first non-blank word, starting from relative address zero. One fIPS cycle is required per word to be verified,
and the time required for the operation is calculated using the formula:
Eqn. 21
Table 34. FlexCAN Wake-up Pulse Characteristics
Conditions are shown in Table 7 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
W1
P FlexCAN Wake-up dominant pulse filtered
tWUP
——
2
μs
W2
P FlexCAN Wake-up dominant pulse passed
tWUP
5—
—
μs
150 KHz
fNVMOP 200 KHz
≤
<
t
mass ≈ 20000
t
NVMOP
t
check
locations
15
+
() t
IPS
=
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相關(guān)代理商/技術(shù)參數(shù) |
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| MAC7101MAG50 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
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