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參數(shù)資料
| 型號： | MAC7121VVF |
| 廠商： | Motorola, Inc. |
| 英文描述： | MAC7100 Microcontroller Family Hardware Specifications |
| 中文描述： | MAC7100微控制器系列硬件規(guī)格 |
| 文件頁數(shù)： | 4/48頁 |
| 文件大?。?/td> | 1514K |
| 代理商： | MAC7121VVF |
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4
MAC7100 Microcontroller Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Electrical Characteristics
3.3
ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise.
A11
XFC, EXTAL, XTAL inputs
V
ILV
V
TEST
–0.3
+3.0
V
A12
TEST input
Instantaneous Maximum Current
2
Single pin limit for XFC, EXTAL, XTAL
3
Single pin limit for all digital I/O pins
4
Single pin limit for all analog input pins
4
Single pin limit for TEST
5
–0.3
+10.0
V
A13
I
DL
I
D
I
DA
I
DT
T
stg
–25
+25
mA
A14
–25
+25
mA
A15
–25
+25
mA
A16
–0.25
0
mA
A17
Storage Temperature Range
–65
+155
°
C
1
The device contains an internal voltage regulator to generate the logic and PLL supply from the I/O supply. The
absolute maximum ratings apply when the device is powered from an external source.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values using V
POSCLAMP
= V
DD
A + 0.3 V and V
NEGCLAMP
= –0.3 V, then use the larger of the
calculated values.
These pins are internally clamped to V
SS
PLL and V
DD
PLL.
All I/O pins are internally clamped to V
SS
X and V
DD
X, V
SS
R and V
DD
R or V
SS
A and V
DD
A.
This pin is clamped low to V
SS
X, but not clamped high, and must be tied low in applications.
2
3
4
5
Table 4. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human Body
Series Resistance
R1
1500
Ohm
Storage Capacitance
C
100
pF
Number of Pulses per pin
positive
negative
—
—
3
3
Machine
Series Resistance
R1
0
Ohm
Storage Capacitance
C
200
pF
Number of Pulse per pin
positive
negative
—
—
3
3
Latch-up
Minimum input voltage limit
–2.5
V
Maximum input voltage limit
7.5
V
Table 3. Absolute Maximum Ratings (continued)
Num
Rating
Symbol
Min
Max
Unit
F
Freescale Semiconductor, Inc.
n
.
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