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| 型號： | MAC7141CFU50 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, LQFP-100 |
| 文件頁數(shù)： | 21/48頁 |
| 文件大?。?/td> | 1282K |
| 代理商： | MAC7141CFU50 |
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MAC7100 Microcontroller Family Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Electrical Characteristics
3.10.4 ATD Timing Specifications
6 Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for
each 8 to 12
°C, in the ambient temperature range of 50 to 125 °C.
7 Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs
greater than VRH and 0x000 for values less than VRL. This assumes that VDDA ≥ AVRH and VRL ≥ VSSA due to the
presence of the sample amplifier. Other channels are not affected by non-disruptive conditions.
8 Coupling Ratio, K, is defined as the ratio of the output current, IOUT, measured on the pin under test to the injection
current, IINJ, when both adjacent pins are overstressed with the specified injection current. K = IOUT ÷ IINJ. The input
voltage error on the channel under test is calculated as Verr = IINJ x K x RS.
9 Total injection current is determined by the number of channels injecting (for example, 15), external injection voltage
(VINJ –VPOSCLAMP, or VINJ – VNEGCLAMP), and the external source impedance, Rs, wherein all input channels have
the same values. To determine the error voltage on the converted channel, only the two adjacent channels are
expected to contribute to the error voltage: Verrj = (VINJ – VCLAMP) × K × 2.
10 For a maximum sampling error of the input voltage ≤ 1LSB, then the external filter capacitor, Cf ≥ 1024 × CSAMP. The
value of CSAMP in the new design may be reduced, or increased slightly.
Table 30. ATD Performance Specifications 1
1 All voltages referred to VSSA, VDDA = 5.0 V±10%, ATD clock = 2.1 Mhz., –40 to 125 °C.
Num C
Rating
Symbol
Min
Typ
Max
Unit
T1
D 10-bit Resolution
LSB
—
5
—
mV
T2
D 10-bit Differential Nonlinearity 2
2 Note: 1 LSB = 1 Count (At VREF = 5.12 V, one 8 bit count = 20 mV, one 10-bit count = 5 mV)
DNL
–1
—
1
Counts
T3
D 10-bit Integral Nonlinearity 2
INL
–2
—
2
Counts
T4
D 10-bit Absolute Error 2, 3
3 These values include quantization error which is inherently 1/2 count for any A/D converter.
AE
–2.5
—
2.5
Counts
T5
D Max input Source Impedance 4
4 This value is based on error attributed to the specified leakage value of TBD nA resulting in an error of less than 1/2
LSB (2.5 mV). If operating conditions are less than worst case or leakage-induced error is acceptable, larger values
of source resistance is allowable.
RS
—
100
k
Table 31. ATD Timing Specifications
Num C
Rating
Symbol
Min
Typ
Max
Unit
U1
D ATD Module Clock Frequency
Fclk
——
25.0
MHz
U2
D ATD Conversion Clock Frequency
Fatdclk
0.5
—
2.0
MHz
U3
D ATD 10-bit Conversion Period*
Clock Cycles
Conv. Time
NCONV10*
TCONV10
14*
7
—
28*
14
Cycles*
sec
U4
D Stop Recovery Time (VDDA = 5.0 V)
TSR
——
100
sec
Table 32. ATD External Trigger Timing Specifications
Num
C
Parameter
Symbol
Min
Max
Unit
V1
D ETRIG Minimum Period
TPERIOD
—1 sample +
1 conv. +
1 ATD clock
CYCLE
V2
D ETRIG Minimum Pulse Width
tPW
2
—
SYS CLK
V3
D ETRIG Level Recovery 1
1 Time prior to end of conversion that the ETRIG pin must be deactivated so that another conversion sequence does
not start.
tLR
1
—
SYS CLK
V4
D Conversion Start Delay
tDLY
—
2
SYS CLK
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相關代理商/技術參數(shù) |
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|---|---|
| MAC7141CPV | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MAC7100 Microcontroller Family Hardware Specifications |
| MAC7141CPV50 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| MAC7141CVF | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MAC7100 Microcontroller Family Hardware Specifications |
| MAC7141CVF50 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| MAC7141CVM50 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
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