參數(shù)資料
型號: MACH215-12JC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High-Density EE CMOS Programmable Logic
中文描述: EE PLD, 12 ns, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 14/30頁
文件大?。?/td> 245K
代理商: MACH215-12JC
21
MACH215-12/15/20
SWITCHING WAVEFORMS
Notes:
1. VT = 1.5 V.
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns–4 ns typical.
tPD
Input, I/O, or
Feedback
Combinatorial
Output
VT
Combinatorial Output
VT
Input, I/O,
or Feed-
back
Registered
Output
Registered Output
tS
tCO
VT
tH
VT
Clock
tWH
Clock
Clock Width
tWL
VT
Combinatorial
Output
Registered Input (MACH 2 and 4)
tSIR
tICO
VT
tHIR
VT
Input
Register
Clock
Registered
Input
Latched Output (MACH 2, 3, and 4)
Gate
Gate Width (MACH 2, 3, and 4)
tGWS
VT
tICS
Input Register to Output Register Setup
(MACH 2 and 4)
Output
Register
Clock
Input
Register
Clock
Registered
Input
tPDL
Input, I/O, or
Feedback
Latched
Out
Gate
VT
tHL
tSL
tGO
VT
16751E-14
16751E-15
16751E-16
16751E-17
16751E-18
16751E-19
16751E-20
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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