參數(shù)資料
型號(hào)： MACH215-15JC
廠商： LATTICE SEMICONDUCTOR CORP
元件分類(lèi)： PLD
英文描述： High-Density EE CMOS Programmable Logic
中文描述： EE PLD, 15 ns, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 5/30頁(yè)
文件大?。?/td> 245K
代理商： MACH215-15JC
13
MACH215-12/15/20 (Com’l)
CAPACITANCE (Note 1)
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 5.0 V, TA = 25
°C,
6
pF
COUT
Output Capacitance
VOUT = 2.0 V
f = 1 MHz
8
pF
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
Parameter
Symbol
Parameter Description
Min
Max
Min
Max
Min
Max
Unit
tPD
Input, I/O, or Feedback to Combinatorial Output (Note 3)
3
12
3
15
3
20
ns
D-type
5
6
8
ns
T-type
6
7
9
ns
tHA
Register Data Hold Time Using Product Term Clock
5
6
8
ns
tCOA
Product Term Clock to Output (Note 3)
4
14
4
18
4
22
ns
tWLA
LOW
8
9
12
ns
tWHA
HIGH
8
9
12
ns
D-type
52.6
41.7
33.3
MHz
T-type
50
40
32.2
MHz
D-type
58.8
45.5
35.7
MHz
T-type
55.6
43.5
34.5
MHz
62.5
55.6
41.7
MHz
D-type
7
10
13
ns
T-type
8
11
14
ns
tHS
Register Data Hold Time Using Global Clock
0
ns
tCOS
Global Clock to Output (Note 3)
2
8
2
10
2
12
ns
tWLS
LOW
6
8
ns
tWHS
HIGH
6
8
ns
D-type
66.7
50
40
MHz
T-type
62.5
47.6
38.5
MHz
fMAXS
D-type
83.3
66.6
50
MHz
T-type
76.9
62.5
47.6
MHz
83.3
62.5
MHz
tSLA
56
8
ns
tHLA
Latch Data Hold Time Using Product Term Clock
5
6
8
ns
tGOA
Product Term Gate to Output (Note 3)
16
19
22
ns
tGWA
Product Term Gate Width LOW (for LOW transparent)
8
9
12
ns
or HIGH (for HIGH transparent)
tSLS
Setup Time from Input, I/O, or Feedback to Global Gate
7
10
13
ns
tHLS
Latch Data Hold Time Using Global Gate
0
ns
tGOS
Gate to Output (Note 3)
10
11
12
ns
tGWS
Global Gate Width LOW (for LOW transparent)
6
8
ns
or HIGH (for HIGH transparent)
Maximum
Frequency
Using
Product
Term
Clock
(Note 1)
External Feedback
1/(tSA + tCOA)
Internal Feedback (fCNTA)
No Feedback
1/(tWLA + tWHA)
Global Clock Width
-12
Maximum
Frequency
Using
Global
Clock
(Note 1)
Setup Time from Input, I/O, or
Feedback to Product Term Clock
External Feedback
1/(tSS + tCOS)
Internal Feedback (fCNTS)
No Feedback
1/(tWLS + tWHS)
-15
-20
tSS
tSA
Setup Time from Input, I/O,
or Feedback to Global Clock
Setup Time from Input, I/O,
or Feedback to Product Term Gate
fMAXA
Product Term, Clock Width
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