參數(shù)資料
型號: MAR28155LXXXX
廠商: DYNEX SEMICONDUCTOR LTD
元件分類: 微控制器/微處理器
英文描述: 24 I/O, PIA-GENERAL PURPOSE, CQCC44
封裝: LCC-44
文件頁數(shù): 19/20頁
文件大小: 254K
代理商: MAR28155LXXXX
MA28155
8/20
Output Control Signal Definition (Mode 1)
OBFN
OBFN (Output Buffer Full Register Bit).
The OBFN output will go low to indicate that the CPU has
written data out to the specified port. The OBF register bit will
be set by the rising edge of the DSN input and reset by ACKN
input being low.
ACKN
ACKN (Acknowledge Input).
A low on this input informs the 28155 that the data from
port A or port B has been accepted; in essence, a response
from the peripheral device indicating that it has received the
data output by the CPU.
INTR (Interrupt Request).
A high on this output can be used to interrupt the CPU
when an output device has accepted data transmitted by the
CPU. INTR is set when ACKN is high, OBFN is high and INTE
is high. It is reset by the falling edge of DSN
.
INTE A: Controlled by bit set/reset of PC6
INTE B: Controlled by bit set/reset of PC2
Figure 11: Strobed Output (PORT A)
Figure 12: Strobed Output (PORT B)
DSN
RD/WN
ACKAN
OBFAN
RD/WN
DSN
ACKBN
OBFBN
相關(guān)PDF資料
PDF描述
MAS28155CXXXX 24 I/O, PIA-GENERAL PURPOSE, CDIP40
MAH28155LXXXX 24 I/O, PIA-GENERAL PURPOSE, CQCC44
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