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參數(shù)資料
| 型號： | MAX1022BETX+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 26/44頁 |
| 文件大小： | 0K |
| 描述： | IC ADC/DAC 10BIT W/FIFO 36-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 10 b |
| 采樣率（每秒）： | 225k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 36-TQFN 裸露焊盤（6x6） |
| 包裝： | 帶卷 (TR) |
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MAX1020/MAX1022/MAX1057/MAX1058
10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
32
______________________________________________________________________________________
Table 20. DAC Serial-Interface Configuration
16-BIT SERIAL WORD
MSB
LSB
CONTROL
BITS
DATA BITS
C3 C2 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X
DESCRIPTION
FUNCTION
0
X
NOP
No operation.
0
1
0
X
RESET
Reset all internal registers to 000h and
leave output buffers in their present state.
0
1
X
Pull-High
Preset all internal registers to FFFh and
leave output buffers in their present state.
0
1
0
—
X
DAC0
D9–D0 to input register 0,
DAC output unchanged.
0
1
—
X
DAC1
D9–D0 to input register 1,
DAC output unchanged.
0
1
0
—
X
DAC2
D9–D0 to input register 2,
DAC output unchanged.
0
1
0
1
—
X
DAC3
D9–D0 to input register 3,
DAC output unchanged.
0
1
0
—
X
DAC4
D9–D0 to input register 4,
DAC output unchanged.
0
1
—
X
DAC5
D9–D0 to input register 5,
DAC output unchanged.
1
0
—
X
DAC6
D9–D0 to input register 6,
DAC output unchanged.
1
0
1
—
X
DAC7
D9–D0 to input register 7,
DAC output unchanged.
1
0
1
0
—
X
DAC0–DAC3
D9–D0 to input registers 0–3 and DAC
registers 0–3. DAC outputs updated
(write-through).
1
0
1
—
X
DAC4–DAC7
D9–D0 to input registers 4–7 and DAC
registers 5–8. DAC outputs updated
(write-through).
1
0
—
X
DAC0–DAC7
D9–D0 to input registers 0–7 and DAC
Registers 0–7. DAC outputs updated
(write-through).
1
0
1
—
X
DAC0–DAC7
D9–D0 to input registers 0–7.
DAC outputs unchanged.
111
0
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
X
DAC0–DAC7
Input registers to DAC registers indicated
by ones, DAC outputs updated,
equivalent to software
LDAC.
(No effect on DACs indicated by zeros.)
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