參數(shù)資料
型號(hào): MAX105ECS+T
廠商: Maxim Integrated Products
文件頁數(shù): 4/21頁
文件大?。?/td> 0K
描述: IC ADC 6BIT 800MSPS DL 80TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 6
采樣率(每秒): 800M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 2.6W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 80-TQFP-EP(12x12)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個(gè)單端,單極;2 個(gè)差分,單極
MAX105
signal-to-noise ratio (SNR) specifications will degrade.
The MAX105’s on-board, wide-bandwidth input ampli-
fiers (I&Q) reduce this effect significantly, allowing pre-
cise digitizing of fast analog data at high conversion
rates. The input amplifiers buffer the input signal and
allow a full-scale signal input range of ±400mV
(800mVp-p).
Internal Reference
The MAX105 features an integrated, buffered +2.5V
precision bandgap reference. This reference is internal-
ly scaled to match the analog input range specification
of ±400mV. The data converter’s reference output
(REF) can source up to 500A. REF should be buffered,
if used to supply external devices.
LVDS Digital Outputs
The MAX105 provides data in two’s complement format
to differential LVDS outputs. A simplified circuit
schematic of the LVDS output cells is shown in Figure
2. All LVDS outputs are powered from separate I-chan-
nel OVCCI and Q-channel OVCCQ (Q-channel) power
supplies, which may be operated at +3.3V ±10%. The
Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier
Figure 1. MAX105 Flash Converter Architecture
INI-
INI+
2k
CLK+
AVCC
CLK-
P0I+/P0I-
DREADY+/DREADY-
DOR+/DOR-
P5I+/P5I-
A0I+/A0I-
A5I+/A5I-
P0Q+/P0Q-
P5Q+/P5Q-
A0Q+/A0Q-
A5Q+/A5Q-
10k
10k
CM BUFFER
REFERENCE
PRIMARY
DATA PORT
P0I-P5I
AUXILIARY
DATA PORT
A0I-A5I
PRIMARY
DATA PORT
P0Q-P5Q
AUXILIARY
DATA PORT
A0Q-A5Q
I ADC
1:2
REF
MAX105
INQ-
INQ+
2k
PRE-AMP
Q ADC
REF
DOR
PRE-AMP
MAX105
P0I+ - P5I+
A0I+ - A5I+
P0I- - P5I-
A0I- - A5I-
OVCCI
55
55
Figure 2. Simplified LVDS Output Model
12
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