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參數(shù)資料
| 型號： | MAX105EVKIT |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR MAX105 AND MAX107 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 6 |
| 采樣率（每秒）： | 800M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | 800 mVpp |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 2.6W @ 800MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | MAX105，MAX107 |
| 已供物品： | 板 |
MAX105 LVDS-outputs provide a typical ±270mV volt-
age swing around a common mode voltage of roughly
+1.2V, and must be differentially terminated at the far
end of each transmission line pair (true and comple-
mentary) with 100
.
Out-Of-Range Operation
A single output pair (DOR+, DOR-) is provided to flag
an out-of-range condition, if either the I or Q channel is
out-of-range, where out-of-range is above +FS or below
-FS. It features the same latency as the ADCs output
data and is demultiplexed in a similar fashion. With a
800MHz system clock, DOR+ and DOR- are clocked at
up to 400MHz.
Applications Information
Single-Ended Analog Inputs
The MAX105 is designed to work at full-speed for both
single-ended and differential analog inputs without sig-
nificant degradation in its dynamic performance. Both
input channels I (INI+, INI-) and Q (INQ+, INQ-) have
2k
impedance and allow for AC- and DC-coupled
input signals. In a typical DC-coupled single-ended
configuration (Table 1), the analog input signals enter
the analog input amplifier stages at the in-phase-input
pins INI+/INQ+, while the inverted phase input INI-
/INQ- pins are AC-coupled to AGNDI/AGNDQ. Single-
ended operation allows for an input amplitude of
800mVp-p, centered around VREF.
Differential Analog Inputs
To obtain +FS digital outputs with differential input drive
(Table 2), 400mV must be applied between INI+ (INQ+)
and INI- (INQ-). Midscale digital output codes occur
when there is no voltage difference between INI+
(INQ+) and INI- (INQ-). For a -FS digital output code
both in-phase (INI+, INQ+) and inverted input (INI-,
INQ-) must see -400mV.
Single-Ended to Differential
Conversion Using a Balun
An RF balun (Figure 3) provides an excellent solution to
convert a single-ended signal to a fully differential sig-
nal, required by the MAX105 for optimum performance.
At higher frequencies, the MAX105 provides better
SFDR and THD with fully differential input signals over
single-ended input signals. In differential input mode,
even-order harmonics are suppressed and each input
requires only half the signal-swing compared to single-
ended mode.
Clock Input
The MAX105 features clock inputs designed for either
single-ended or differential operation with very flexible
input drive requirements. The clock inputs (AC- or DC-
coupled) provide a 5k
input impedance to AVCC/2
MAX105
Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier
______________________________________________________________________________________
13
IN-PHASE INPUTS
(INI+, INQ+)
INVERTED INPUTS
(INI-, INQ-)
OUT-OF-RANGE BIT
(DOR+, DOR-)
OUTPUT CODE
> +400mV + VREF
AC – Coupled to AGND_
1
011111
+400mV - 0.5LSB + VREF
AC – Coupled to AGND_
0
011111
0V + VREF
AC – Coupled to AGND_
0
000000/111111
-400mV + 0.5LSB + VREF
AC – Coupled to AGND_
0
100000
< -400mV + VREF
AC – Coupled to AGND_
1
100000
Table 1. Digital Output Codes Corresponding to a DC-Coupled Single-Ended Analog
Input
IN-PHASE INPUTS
(INI+, INQ+)
INVERTED INPUTS
(INI-, INQ-)
OUT-OF-RANGE BIT
(DOR+, DOR-)
OUTPUT CODE
>+200mV + VREF
<-200mV + VREF
1
011111
+200mV - 0.25LSB + VREF
-200mV + 0.25LSB + VREF
0
011111
0V + VREF
0
000000/111111
-200mV + 0.25LSB + VREF
+200mV - 0.25LSB + VREF
0
100000
<-200mV + VREF
>+200mV + VREF
1
100000
Table 2. Digital Output Codes Corresponding to a DC-Coupled Differential Analog Input
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX106 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:【5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier |
| MAX1060 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:400ksps, +5V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface |
| MAX1060ACEI | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1060ACEI+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 5V 10Bit 8Ch 400ksps w/2.5V Ref & Prl Int RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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